RM46L852_15 Datasheet, PDF (65/188 Pages) Texas Instruments – 16- and 32-Bit RISC Flash Microcontroller

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RM46L852
SPNS185C – SEPTEMBER 2012 – REVISED JUNE 2015
6.4 Warm Reset (nRST)
This is a bidirectional reset signal. The internal circuitry drives the signal low on detecting any device reset
condition. An external circuit can assert a device reset by forcing the signal low. On this terminal, the
output buffer is implemented as an open drain (drives low only). To ensure an external reset is not
arbitrarily generated, TI recommends that an external pullup resistor is connected to this terminal.
This terminal has a glitch filter. It also has an internal pullup.
6.4.1 Causes of Warm Reset
Table 6-5. Causes of Warm Reset
DEVICE EVENT
Power-Up Reset
Oscillator fail
PLL slip
Watchdog exception / Debugger reset
Software Reset
External Reset
SYSTEM STATUS FLAG
Exception Status Register, bit 15
Global Status Register, bit 0
Global Status Register, bits 8 and 9
Exception Status Register, bit 13
Exception Status Register, bit 4
Exception Status Register, bit 3
6.4.2 nRST Timing Requirements
Table 6-6. nRST Timing Requirements
t_v(RST)
t_f(nRST)
PARAMETER
Valid time, nRST active after
nPORRST inactive
Valid time, nRST active (all other
System reset conditions)
Filter time nRST pin;
MIN
2256 t_c(OSC) ⁽¹⁾
32 t_c(VCLK)
475
pulses less than MIN will be
filtered out, pulses greater than
MAX will generate a reset
(1) Assumes the oscillator has started up and stabilized before nPORRST is released ..
MAX
2000
UNIT
ns
ns
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System Information and Electrical Specifications
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