DP83816AVNG Datasheet, PDF (64/108 Pages) Texas Instruments – DP83816 10/100 Mb/s Integrated PCI Ethernet Media Access Controller and Physical Layer

4.0 Register Set (Continued)
4.2.20 Boot ROM Address Register
The BRAR is used to setup the address for an access to an external ROM/FLASH device.
Tag: BRAR
Offset: 0050h
Size: 32 bits
Access: Read Write
Hard Reset: FFFFFFFFh
Soft Reset: unchanged
Bit
31
30-16
15-0
Bit Name
AUTOINC
ADDR
Description
Auto-Increment
When set, the contents of ADDR will auto increment with every 32-bit access to the BRDR register.
unused
Boot ROM Address
16-bit address used to access the external Boot ROM.
4.2.21 Boot ROM Data Register
The BRDR is used to read and write ROM/FLASH data from the data from/to an external ROM/FLASH device.
Tag: BRDR
Offset: 0054h
Size: 32 bits
Access: Read Write
Hard Reset: undefined
Soft Reset: undefined
Bit
31-0
Bit Name
DATA
Description
Boot ROM Data
Access port to external Boot ROM. Software can use BRAR and BRDR to read (and write if FLASH
memory is used) the external Boot ROM. All accesses must be 32-bits wide and aligned on 32-bit
boundaries.
4.2.22 Silicon Revision Register
Tag: SRR
Offset: 0058h
Size: 32 bits
Access: Read Only
Hard Reset: as defined
Soft Reset: unchanged
Bit
31-16
15-0
Bit Name
Rev
Description
unused
(reads return 0)
Revision Level
SRR register value for the DP83816 silicon.
DP83816AVNG
00000505h
63
www.national.com