ADC16DX370 Datasheet, PDF (64/77 Pages) Texas Instruments – ADC16DX370 Dual 16-Bit 370 MSPS ADC

ADC16DX370
SNVSA18C – APRIL 2014 – REVISED AUGUST 2014
10 Power Supply Recommendations
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10.1 Power Supply Design
The ADC16DX370 device is a very-high dynamic range device and therefore requires very-low noise power
supplies. LDO-type regulators, capacitive decoupling, and series isolation devices like ferrite beads are all
recommended.
LDO-type low noise regulators should be used to generate the 1.2-, 1.8-, and 3.0-V supplies used by the device.
To improve power efficiency, a switching-type regulator may precede the LDO to efficiently drop a supply to an
intermediate voltage that satisfies the drop-out requirements of the LDO. TI recommends to follow a switching-
type regulator with an LDO to provide the best filtering of the switching noise. Additional ferrite beads and LC
filters may be used to further suppress noise. Supplying power to multiple devices in a system from one regulator
may result in noise coupling between the multiple devices; therefore, series isolation devices and additional
capacitive decoupling is recommended to improve the isolation.
The power supplies must be applied to the ADC16DX370 device in this specific order:
1. VA3.0
2. VA1.8
3. VA1.2
4. VD1.2
First, the VA3.0 (+3.0 V) must be applied to provide the bias for the ESD diodes. The VA1.8 (+1.8-V) supply
should be applied next, followed by the VA1.2 (+1.2-V) supply, and then followed by the VD1.2 (+1.2-V) supply.
As a guideline, each supply should stabilize to within 20% of the final value within 10 ms and before enabling the
next supply in the sequence. If the stabilization time is longer than 10 ms, then the system should perform the
calibration procedure after the supplies have stabilized. Turning power supplies off should occur in the reverse
order. An alternate power-up sequence is also supported which allows enabling the 1.2-V supplies in any order
or at the same time. The alternate sequence is:
1. VA3.0
2. VA1.2 / VD1.2
3. VA1.8
10.2 Decoupling
Decoupling capacitors must be used at each supply pin to prevent supply or ground noise from degrading the
dynamic performance of the ADC and to provide the ADC with a well of charge to minimize voltage ripple caused
by current transients. The recommended supply decoupling scheme is to have a ceramic X7R 0201 0.01-μF and
a X7R 0402 0.1-μF capacitor at each supply pin. The 0201 capacitor must be placed on the same layer as the
device as close to the pin as possible to minimize the AC decoupling path length from the supply pin, through the
capacitor, to the nearest adjacent ground pin. The 0402 capacitor should also be close to the pins. TI does not
recommend placing the capacitor on the opposite board side. Each voltage supply should also have a single 10-
μF decoupling capacitor near the device but the proximity to the supply pins is less critical.
The BP2.5 pin is an external bypass pin used for stabilizing an internal 2.5-V regulator and must have a ceramic
or tantalum 10-μF capacitor and a ceramic 0402 0.1-μF capacitor. The 0.1-μF capacitor should be placed as
close to the BP2.5 pin as possible.
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