TM124MBJ36F Datasheet, PDF (6/10 Pages) Texas Instruments – DYNAMIC RAM MODULE

TM124MBJ36F, TM124MBJ36U 1048576 BY 36-BIT DYNAMIC RAM MODULE
TM248NBJ36F, TM248NBJ36U 2097152 BY 36-BIT DYNAMIC RAM MODULE
SMMS662 – MAY 1996
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)^†
PARAMETER
TEST CONDITIONS
’248NBJ36F - 60 ’248NBJ36F - 70 ’248NBJ36F - 80
MIN MAX MIN MAX MIN MAX
VOH
High-level output
voltage
IOH = – 5 mA
2.4
2.4
2.4
Low-level output
VOL _voltage
IOL = 4.2 mA
0.4
0.4
0.4
II
Input current
(leakage)
IO
Output current
(leakage)
ICC1
Read- or write-cycle
current (see Note 3)
VCC = 5.5 V, VI = 0 V to 6.5 V,
All other pins = 0 V to VCC
VCC = 5.5 V,
VO = 0 V to VCC, CAS high
VCC = 5.5 V, Minimum cycle
± 10
± 10
± 10
± 20
± 20
± 20
491
456
426
ICC2 Standby current
VIH = 2.4 V (TTL),
After 1 memory cycle,
RAS and CAS high
VIH = VCC – 0.2 V (CMOS),
After 1 memory cycle,
RAS and CAS high
12
12
12
6
6
6
Average refresh
ICC3 current (RAS only or
CBR) (see Note 3)
VCC = 5.5 V,
RAS cycling,
Minimum cycle,
CAS high (RAS only);
RAS low after CAS low (CBR)
970
900
840
ICC4
Average page current
(see Note 4)
VCC = 5.5 V,
RAS low,
tPC = MIN,
CAS cycling
276
246
216
† _{For test conditions shown as MIN / MAX, use the appropriate value specified under recommended operating conditions.}
NOTES: 3. Measured with a maximum of one address change while RAS = VIL
4. Measured with a maximum of one address change while CAS = VIH
UNIT
V
V
µA
µA
mA
mA
mA
mA
mA
capacitance over recommended ranges of supply voltage and operating free-air temperature,
f = 1 MHz (see Note 5)
PARAMETER
Ci(A) Input capacitance, address inputs
Ci(R) Input capacitance, RAS inputs
Ci(C) Input capacitance, CAS inputs
Ci(W) Input capacitance, write-enable input
Co(DQ) Output capacitance on DQ pins
NOTE 5: Bias on pins under test is 0 V.
’124MBJ36F
MIN MAX
22
17
19
28
10
’248NBJ36F
MIN MAX
37
17
33
49
17
UNIT
pF
pF
pF
pF
pF
6
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