SN74LV1T125_15 Datasheet, PDF (6/20 Pages) Texas Instruments – SN74LV1T125 Single Power Supply Single Buffer Gate with 3-State Output CMOS Logic Level Shifter

SN74LV1T125
SCLS745A – DECEMBER 2013 – REVISED FEBRUARY 2014
www.ti.com
4.3 Absolute Maximum Ratings⁽¹⁾
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
V_CC Supply voltage range
V_I
Input voltage range⁽²⁾
Voltage range applied to any output in the high-impedance or power-off state⁽²⁾
V_O
Voltage range applied to any output in the high or low state⁽²⁾
I_IK
Input clamp current
V_I < 0
I_OK
Output clamp current
V_O < 0 or V_O > V_CC
I_O
Continuous output current
Continuous current through V_CC or GND
θ_JA
Package thermal
impedance ⁽³⁾
DBV package
DCK package
–0.5
7.0 V
–0.5
7.0 V
–0.5
4.6 V
–0.5 V_CC + 0.5
V
–20 mA
±20 mA
±25 mA
±50 mA
206
°C/W
252
T_stg Storage temperature range
–65
150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
4.4 Recommended Operating Conditions⁽¹⁾
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V_CC
V_I
V_O
I_OH
I_OL
Δt/Δv
T_A
Supply voltage
Input voltage
Output voltage
V_CC = 1.8 V
High-level output
current
V_CC = 2.5 V
V_CC = 3.3 V
V_CC = 5.0 V
V_CC = 1.8 V
Low-level output
current
V_CC = 2.5 V
V_CC = 3.3 V
V_CC = 5.0 V
Input transition rise or
fall rate
V_CC = 1.8 V
V_CC = 3.3 V or 2.5 V
V_CC = 5.0 V
Operating free-air temperature
1.6
5.5 V
0
5.5 V
0
V_CC
V
–3.0
–5.0
mA
–7.0
–8.0
3.0
5.0
mA
7.0
8.0
20
20 ns/V
20
–40
125 °C
(1) All unused inputs of the device must be held at V_CC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
6
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