MSP430X12X_17 Datasheet, PDF (6/44 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430x12x
MIXED SIGNAL MICROCONTROLLER
SLAS312C − JULY 2001 − REVISED SEPTEMBER 2004
interrupt vector addresses
The interrupt vectors and the power-up starting address are located in the address range of 0FFFFh-0FFE0h.
The vector contains the 16-bit address of the appropriate interrupt handler instruction sequence.
INTERRUPT SOURCE
Power-up
External reset
Watchdog
Flash memory
INTERRUPT FLAG
WDTIFG (see Note1)
KEYV (see Note 1)
SYSTEM INTERRUPT WORD ADDRESS
Reset
0FFFEh
PRIORITY
15, highest
NMI
NMIIFG (see Notes 1 and 4)
(non)-maskable,
Oscillator fault
OFIFG (see Notes 1 and 4)
(non)-maskable,
0FFFCh
14
Flash memory access violation ACCVIFG (see Notes 1 and 4)
(non)-maskable
0FFFAh
13
0FFF8h
12
Comparator_A
CAIFG
maskable
0FFF6h
11
Watchdog timer
WDTIFG
maskable
0FFF4h
10
Timer_A3
TACCR0 CCIFG (see Note 2)
maskable
0FFF2h
9
Timer_A3
TACCR1 and TACCR2
CCIFGs, TAIFG
maskable
0FFF0h
8
(see Notes 1 and 2)
USART0 receive
URXIFG0
maskable
0FFEEh
7
USART0 transmit
UTXIFG0
maskable
0FFECh
6
0FFEAh
5
0FFE8h
4
I/O Port P2
(eight flags − see Note 3)
P2IFG.0 to P2IFG.7
(see Notes 1 and 2)
maskable
0FFE6h
3
I/O Port P1
(eight flags)
P1IFG.0 to P1IFG.7
(see Notes 1 and 2)
maskable
0FFE4h
2
0FFE2h
1
0FFE0h
0, lowest
NOTES: 1. Multiple source flags
2. Interrupt flags are located in the module
3. There are eight Port P2 interrupt flags, but only six Port P2 I/O pins (P2.0−5) are implemented on the ’12x devices.
4. (non)-maskable: the individual interrupt enable bit can disable an interrupt event, but the general interrupt enable cannot.
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