F28M35H20B1_1110 Datasheet, PDF (6/104 Pages) Texas Instruments – Concerto Microcontrollers

F28M35H20B1, F28M35H20C1
F28M35H22B1, F28M35H22C1, F28M35H32B1, F28M35H32C1
F28M35H50B1, F28M35H50C1, F28M35H52B1, F28M35H52C1
SPRS742B – JUNE 2011 – REVISED OCTOBER 2011
LOCATION
Section 2.4.4
Section 2.4.6
Section 2.5
Section 2.5.1
Section 2.5.2
Figure 2-3
Section 2.5.3
Section 2.5.4
Section 2.6
Section 2.7
Figure 2-4
Section 2.8
Section 2.8.1
Figure 2-5
Section 2.8.4
Section 2.9
Table 2-19
Figure 2-6
Section 2.9.1
Section 2.9.2
Section 2.9.3
Section 2.10
Table 2-20
Figure 2-7
Section 2.10.1
Section 2.10.3
Section 2.11
Section 2.12
Section 2.13
Section 2.13
Section 2.13.1
Figure 2-8
Figure 2-9
Figure 2-10
Table 2-21
Table 2-22
Table 2-23
Section 2.13.2
Table 2-24
Figure 2-11
Section 2.13.3
Table 2-25
Section 2.13.4
Table 2-26
Figure 3-1
ADDITIONS, DELETIONS, AND MODIFICATIONS
Updated "C28x Local Peripherals" section
Updated "C28x Accessing Shared Resources and Analog Peripherals" section
Updated "Analog Subsystem" section
Updated "ADC1" section
Updated "ADC2" section
Updated "Analog Subsystem" figure
Updated "Analog Comparator + DAC" section
Updated "Analog Common Interface Bus (ACIB)" section
Updated "Master Subsystem NMIs" section
Updated "Control Subsystem NMIs" section
Updated "Cortex™-M3 NMI and C28x NMI" figure
Updated "Resets" section
Updated "Cortex™-M3 Resets" section
Updated "Resets" figure
Added "Device Boot Sequence" section
Updated "Master Subsystem Clocking" section
Added "Master Subsystem Low-Power Modes" table
Updated "Cortex™-M3 Clocks and Low-Power Modes" figure
Updated "Cortex™-M3 Run Mode" section
Updated "Cortex™-M3 Sleep Mode" section
Updated "Cortex™-M3 Deep Sleep Mode" section
Updated "Control Subsystem Clocking" section
Added "Control Subsystem Low-Power Modes" table
Updated "C28x Clocks and Low-Power Modes" figure
Updated "C28x Normal Mode" section
Updated "C28x Standby Mode" section
Updated "Analog Subsystem Clocking" section
Added "Shared Resources Clocking" section
Changed section title from "GPIOs" to "GPIOs and Other Pins"
Updated "GPIOs and Other Pins" section
Updated "GPIO_MUX1" section
Updated "GPIOs and Other Pins" figure
Added "GPIO_MUX1 Block" figure
Added "GPIO_MUX1 Pin Mapping Through Register Set A" figure
Added "GPIO_MUX1 Pin Assignments (M3 Primary Modes)" table
Added "GPIO_MUX1 Pin Assignments (M3 Alternate Modes)" table
Added "GPIO_MUX1 Pin Assignments (C28x Peripheral Modes)" table
Updated "GPIO_MUX2" section
Added "GPIO_MUX2 Pin Assignments (C28x Peripheral Modes)" table
Added "Pin Muxing on AIO_MUX1, AIO_MUX2, and GPIO_MUX2" figure
Updated "AIO_MUX1" section
Added "AIO_MUX1 Pin Assignments (C28x AIO Modes)" table
Updated "AIO_MUX2" section
Added "AIO_MUX2 Pin Assignments (C28x AIO Modes)" table
144-Pin RFP PowerPAD™ HTQFP (Top View):
• Pin 135: Changed signal name from "ADC2V_REFLO" to "ADC2V_REFLO, V_SSA2"
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