DS14C535_15 Datasheet, PDF (6/14 Pages) Texas Instruments – +5V Supply EIA/TIA-232 3 x 5 Driver/Receiver

DS14C535
SNLS092C – MAY 1998 – REVISED APRIL 2013
www.ti.com
Figure 9. Receiver SHUTDOWN (SD) Delay Test Circuit
Figure 10. Receiver SHUTDOWN (SD) Delay Timing
PIN DESCRIPTIONS
V_CC (Pin 3). Power supply pin for the device, +5V (±0.5V).
V+ (Pin 1). Positive supply for EIA/TIA-232-E drivers. Recommended external capacitor—0.1 μF (16V). This supply is not intended to be
loaded externally.
V− (Pin 25). Negative supply for EIA/TIA-232-E drivers. Recommended external capacitor—0.1 μF (16V). This supply is not intended to be
loaded externally.
C1+, C1− (Pins 2, 4). External capacitor connection pins.
C2+, C2− (Pins 28, 26). External capacitor connection pins.
SHUTDOWN (SD) (Pin 23). A High on the SHUTDOWN pin will lower the total I_CC current to less than 10 μA, providing a low power state.
In this mode receiver R5 remains active. The SD pin should be driven or tied low (GND) to disable the shutdown mode.
D_IN 1–3 (Pins 7, 8, 9). Driver input pins.
D_OUT 1–3 (Pins 22, 21, 20). Driver output pins conform to EIA/TlA-232 -E levels.
R_IN 1–5 (Pins 19, 18, 17, 16, 15). Receiver input pins accept EIA/TIA-232-E input voltages (±25V). Receivers ensures hysteresis of TBD
mV. Unused receiver input pins may be left open. Internal input resistor (5 kΩ) pulls input LOW, providing a failsafe HIGH output.
R_OUT 1–5 (Pins 10, 11, 12, 13, 14). Receiver output pins.
GND (Pins 5, 27). Ground Pins. Both pins must be connected to external ground. These pins are not connected together on the chip.
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