DAC5675A-SP Datasheet, PDF (6/23 Pages) Texas Instruments – CLASS V, 14-BIT, 400-MSPS DIGITAL-TO-ANALOG CONVERTER

DAC5675A-SP
SGLS387D – JULY 2007 – REVISED OCTOBER 2009 ..................................................................................................................................................... www.ti.com
Digital Specifications (Unchanged after 100 kRad)
over operating free-air temperature range, typical values at 25°C, AV_DD = 3.3 V, DV_DD = 3.3 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
LVDS Interface: Nodes D[13:0]A, D[13:0]B
V_ITH+
Positive-going differential input
voltage threshold
100
mV
V_ITH–
Negative-going differential input
voltage threshold
–100
mV
Z_T
Internal termination impedance
C_I
Input capacitance
CMOS Interface (SLEEP)
90
110 132
Ω
2
pF
V_IH
High-level input voltage
V_IL
Low-level input voltage
I_IH
High-level input current
I_IL
Low-level input current
Input capacitance
2
–100
–10
3.3
V
0 0.8
V
100 μA
10 μA
2
pF
Clock Interface (CLK, CLKC)
|CLK-CLKC|
t_w(H)
t_w(L)
Clock differential input voltage
Clock pulse width high
Clock pulse width low
Clock duty cycle
0.4
0.8 V_PP
1.25
ns
1.25
ns
40
60 %
V_CM
Common-mode voltage range
Input resistance
Node CLK, CLKC
1.6
2 2.4
V
670
Ω
Input capacitance
Node CLK, CLKC
2
pF
Input resistance
Differential
1.3
kΩ
Input capacitance
Differential
1
pF
Timing
t_SU
Input setup time
t_H
Input hold time
t_DD
Digital delay time (DAC latency)
1.5
ns
0.0
ns
3
clk
6
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