CSD97374Q4M_15 Datasheet, PDF (6/20 Pages) Texas Instruments – Synchronous Buck NexFET Power Stage

Not Recommended For New Designs
CSD97374Q4M
SLPS382C – JANUARY 2013 – REVISED JULY 2013
PIN CONFIGURATION
SKIP# 1
V_{DD 2}
P_{GND 3}
V_{SW 4}
9
P_GND
8 PWM
7 BOOT
6 BOOT_R
5 ^V_IN
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Figure 13. Top View
PIN
NO. NAME
1 SKIP#
2 V_DD
3 P_GND
4 V_SW
5 V_IN
6 BOOT_R
7 BOOT
8 PWM
9 P_GND
PIN DESCRIPTION
DESCRIPTION
This pin enables the Diode Emulation function. When this pin is held Low, Diode Emulation Mode is enabled for the
Sync FET. When SKIP# is High, the CSD97374Q4M operates in Forced Continuous Conduction Mode. A tri-state
voltage on SKIP# puts the driver into a very low power state.
Supply Voltage to Gate Drivers and internal circuitry.
Power Ground, Needs to be connected to Pin 9 and PCB
Voltage Switching Node – pin connection to the output inductor.
Input Voltage Pin. Connect input capacitors close to this pin.
Bootstrap capacitor connection. Connect a minimum 0.1µF 16V X5R, ceramic cap from BOOT to BOOT_R pins. The
bootstrap capacitor provides the charge to turn on the Control FET. The bootstrap diode is integrated.
Pulse Width modulated 3-state input from external controller. Logic Low sets Control FET gate low and Sync FET gate
high. Logic High sets Control FET gate high and Sync FET gate Low. Open or High Z sets both MOSFET gates low if
greater than the 3-State Shutdown Hold-off Time (t_3HT)
Power Ground
6
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