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CD54HC597_14 Datasheet, PDF (6/20 Pages) Texas Instruments – High-Speed CMOS Logic 8-Bit Shift Register with Input Storage
◁
CD54HC597, CD74HC597, CD74HCT597
Prerequisite for Switching Specifications (Continued)
25oC
PARAMETER
SYMBOL VCC (V) MIN
DS to SHCP Setup Time
tH
Dn to STCP Setup Time
4.5
10
STCP to SHCP Hold Time
tH
4.5
0
DS to SHCP Hold Time
tH
4.5
3
Dn to STCP Hold Time
MR to SHCP Removal
Time
tREM
4.5
10
TYP
-
-
-
-
MAX
-
-
-
-
-40oC TO 85oC
MIN TYP MAX
13
-
-
0
-
-
3
-
-
13
-
-
-55oC TO 125oC
MIN TYP MAX UNITS
15
-
-
ns
0
-
-
ns
3
-
-
ns
15
-
-
ns
Switching Specifications Input tr, tf = 6ns
PARAMETER
TEST
25oC
-40oC to 85oC -55oC to 125oC
SYMBOL CONDITIONS VCC (V) MIN TYP MAX MIN MAX MIN MAX UNITS
HC TYPES
Propagation Delay
tPLH, tPHL CL = 50pF
2
-
-
175
-
220
-
265 ns
SHCP to Q7
4.5
-
-
35
-
44
-
53
ns
CL =15pF
5
-
14
-
-
-
-
-
ns
CL = 50pF
6
-
-
30
-
37
-
45
ns
PL to Q7
tPLH, tPHL CL = 50pF
2
-
-
200
-
250
-
300 ns
4.5
-
-
40
-
50
-
60
ns
STCP to Q7
CL =15pF
5
CL = 50pF
6
tPLH, tPHL CL = 50pF
2
4.5
-
17
-
-
-
-
-
-
34
-
43
-
-
-
240
-
300
-
-
-
48
-
60
-
-
ns
51
ns
360 ns
72
ns
MR to Q7
CL =15pF
5
CL = 50pF
6
tPLH, tPHL CL = 50pF
2
4.5
-
20
-
-
-
-
-
-
41
-
51
-
-
-
175
-
220
-
-
-
35
-
44
-
-
ns
61
ns
265 ns
53
ns
Output Transition Time
CL =15pF
5
-
14
-
-
-
-
-
ns
CL = 50pF
6
-
-
30
-
37
-
45
ns
tTLH, tTHL CL = 50pF
2
-
-
75
-
95
-
110 ns
4.5
-
-
15
-
19
-
22
ns
6
-
-
13
-
16
-
19
ns
Input Capacitance
Power Dissipation
Capacitance, (Notes 3, 4)
CI
CL = 50pF
-
-
-
10
-
10
-
10
pF
CPD
-
5
- 13.5 -
-
-
-
-
pF
HCT
Propagation Delay
SHCP to Q7
PL to Q7
STCP to Q7
tPLH, tPHL
CL = 50pF
4.5
CL = 15pF
5
tPLH, tPHL CL = 50pF
4.5
CL = 15pF
5
tPLH, tPHL CL = 50pF
4.5
CL = 15pF
5
-
-
38
-
48
-
-
16
-
-
-
-
-
-
48
60
-
20
-
-
-
-
-
-
56
70
-
23
-
-
-
-
57
ns
-
ns
72
ns
-
ns
84
ns
-
ns
6
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