CD54HC11_14 Datasheet, PDF (6/15 Pages) Texas Instruments – High-Speed CMOS Logic Triple 3-Input AND Gate

PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
5962-8970901CA
Status Package Type Package Pins Package
(1)
Drawing
Qty
ACTIVE
CDIP
J
14
1
Eco Plan
(2)
TBD
CD54HC11F
CD54HC11F3A
ACTIVE
ACTIVE
CDIP
CDIP
J
14
1
J
14
1
TBD
TBD
CD54HCT11F
CD54HCT11F3A
ACTIVE
ACTIVE
CDIP
CDIP
J
14
1
J
14
1
TBD
TBD
CD74HC11E
CD74HC11EE4
CD74HC11M
CD74HC11M96
CD74HC11M96G4
CD74HC11MG4
CD74HC11MT
CD74HCT11E
CD74HCT11M
CD74HCT11M96
CD74HCT11M96E4
CD74HCT11M96G4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
SOIC
SOIC
SOIC
SOIC
N
14
25
Pb-Free
(RoHS)
N
14
25
Pb-Free
(RoHS)
D
14
50 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14
50 Green (RoHS
& no Sb/Br)
D
14 250 Green (RoHS
& no Sb/Br)
N
14
25
Pb-Free
(RoHS)
D
14
50 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
Lead/Ball Finish
(6)
A42
A42
A42
A42
A42
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
MSL Peak Temp
(3)
N / A for Pkg Type
Op Temp (°C)
-55 to 125
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
N / A for Pkg Type -55 to 125
N / A for Pkg Type -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
N / A for Pkg Type -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Device Marking
(4/5)
5962-8970901CA
CD54HCT11F3A
CD54HC11F
8404801CA
CD54HC11F3A
CD54HCT11F
5962-8970901CA
CD54HCT11F3A
CD74HC11E
CD74HC11E
HC11M
HC11M
HC11M
HC11M
HC11M
CD74HCT11E
HCT11M
HCT11M
HCT11M
HCT11M
Samples
Addendum-Page 1