CD54HC00_16 Datasheet, PDF (6/11 Pages) Texas Instruments – High-Speed CMOS Logic Quad 2-Input NAND Gate

PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
5962-8683101CA
Status Package Type Package Pins Package
(1)
Drawing
Qty
ACTIVE
CDIP
J
14
1
Eco Plan
(2)
TBD
CD54HC00F
CD54HC00F3A
ACTIVE
ACTIVE
CDIP
CDIP
J
14
1
J
14
1
TBD
TBD
CD54HCT00F
CD54HCT00F3A
ACTIVE
ACTIVE
CDIP
CDIP
J
14
1
J
14
1
TBD
TBD
CD74HC00E
CD74HC00EE4
CD74HC00M
CD74HC00M96
CD74HC00M96E4
CD74HC00M96G4
CD74HC00ME4
CD74HC00MT
CD74HCT00E
CD74HCT00EE4
CD74HCT00M
CD74HCT00M96
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
N
14
25
Pb-Free
(RoHS)
N
14
25
Pb-Free
(RoHS)
D
14
50 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14
50 Green (RoHS
& no Sb/Br)
D
14 250 Green (RoHS
& no Sb/Br)
N
14
25
Pb-Free
(RoHS)
N
14
25
Pb-Free
(RoHS)
D
14
50 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
Lead/Ball Finish
(6)
A42
A42
A42
A42
A42
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
MSL Peak Temp
(3)
N / A for Pkg Type
Op Temp (°C)
-55 to 125
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
N / A for Pkg Type -55 to 125
N / A for Pkg Type -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
N / A for Pkg Type -55 to 125
N / A for Pkg Type -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Device Marking
(4/5)
5962-8683101CA
CD54HCT00F3A
CD54HC00F
8403701CA
CD54HC00F3A
CD54HCT00F
5962-8683101CA
CD54HCT00F3A
CD74HC00E
CD74HC00E
HC00M
HC00M
HC00M
HC00M
HC00M
HC00M
CD74HCT00E
CD74HCT00E
HCT00M
HCT00M
Samples
Addendum-Page 1