CD4001B_15 Datasheet, PDF (6/18 Pages) Texas Instruments – CMOS NOR Gates

PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
CD4002BE
CD4002BEE4
CD4002BF
CD4002BF3A
CD4002BM
CD4002BM96
CD4002BMG4
CD4002BNSR
CD4002BNSRE4
CD4002BNSRG4
CD4002BPW
CD4002BPWR
CD4002BPWRG4
CD4025BE
CD4025BEE4
CD4025BF
CD4025BF3A
CD4025BM
24-Aug-2014
Status Package Type Package Pins Package
(1)
Drawing
Qty
ACTIVE
PDIP
N
14
25
ACTIVE
PDIP
N
14
25
ACTIVE
CDIP
J
14
1
Eco Plan
(2)
Pb-Free
(RoHS)
Pb-Free
(RoHS)
TBD
ACTIVE
CDIP
J
14
1
TBD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SO
SO
SO
TSSOP
TSSOP
TSSOP
PDIP
PDIP
CDIP
CDIP
SOIC
D
14
50 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14
50 Green (RoHS
& no Sb/Br)
NS 14 2000 Green (RoHS
& no Sb/Br)
NS 14 2000 Green (RoHS
& no Sb/Br)
NS 14 2000 Green (RoHS
& no Sb/Br)
PW
14
90 Green (RoHS
& no Sb/Br)
PW 14 2000 Green (RoHS
& no Sb/Br)
PW 14 2000 Green (RoHS
& no Sb/Br)
N
14
25
Pb-Free
(RoHS)
N
14
25
Pb-Free
(RoHS)
J
14
1
TBD
J
14
1
TBD
D
14
50 Green (RoHS
& no Sb/Br)
Lead/Ball Finish
(6)
CU NIPDAU
CU NIPDAU
A42
A42
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
A42
A42
CU NIPDAU
MSL Peak Temp
(3)
N / A for Pkg Type
Op Temp (°C)
-55 to 125
N / A for Pkg Type -55 to 125
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
N / A for Pkg Type -55 to 125
N / A for Pkg Type -55 to 125
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
-55 to 125
-55 to 125
-55 to 125
Device Marking
(4/5)
CD4002BE
CD4002BE
CD4002BF
7704403CA
CD4002BF3A
CD4002BM
CD4002BM
CD4002BM
CD4002B
CD4002B
CD4002B
CM002B
CM002B
CM002B
CD4025BE
CD4025BE
CD4025BF
CD4025BF3A
CD4025BM
Samples
Addendum-Page 2