LM3S2620 Datasheet, PDF (574/700 Pages) Texas Instruments – Stellaris® LM3S2620 Microcontroller

Pulse Width Modulator (PWM)
Register 1: PWM Master Control (PWMCTL), offset 0x000
This register provides master control over the PWM generation blocks.
PWM Master Control (PWMCTL)
Base 0x4002.8000
Offset 0x000
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
18
17
16
RO
RO
RO
0
0
0
2
1
0
GlobalSync1 GlobalSync0
RO
R/W
R/W
0
0
0
Bit/Field
31:2
1
0
Name
reserved
GlobalSync1
GlobalSync0
Type
RO
R/W
R/W
Reset
0x00
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Update PWM Generator 1
Same as GlobalSync0 but for PWM generator 1.
Update PWM Generator 0
Setting this bit causes any queued update to a load or comparator
register in PWM generator 0 to be applied the next time the
corresponding counter becomes zero. This bit automatically clears when
the updates have completed; it cannot be cleared by software.
574
June 18, 2012
Texas Instruments-Production Data