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TMS470MF06607_14 Datasheet, PDF (56/65 Pages) Texas Instruments – 16/32-Bit RISC Flash Microcontroller
TMS470MF06607
SPNS157C – JANUARY 2012
www.ti.com
5.7 Multi-Buffered A-to-D Converter (MibADC)
The multi-buffered A-to-D converter (MibADC) has a separate power bus for its analog circuitry that
enhances the A-to-D performance by preventing digital switching noise on the logic circuitry which could
be present on VSS and VCC from coupling into the A-to-D analog stage. All A-to-D specifications are
given with respect to ADREFLO unless otherwise noted.
Resolution
Monotonic
Output conversion code
10 bits (1024 values)
Assured
00h to 3FFh [00 for VAI ≤ ADREFLO; 3FF for VAI ≥ ADREFHI]
Table 5-22. MibADC Recommended Operating Conditions(1)
MIN
MAX
ADREFHI
ADREFLO
VAI
IAIC
A-to-D high -voltage reference source
A-to-D low-voltage reference source
Analog input voltage
Analog input clamp current(2)
(VAI < VSSAD - 0.3 or VAI > VCCAD + 0.3)
3.0
VSSAD
ADREFLO
-2
VCCAD
0.3
ADREFHI
2
(1) For VCCAD and VSSAD recommended operating conditions, see Section 4.2.
(2) Input currents into any ADC input channel outside the specified limits could affect conversion results of other channels.
UNIT
V
V
V
mA
Table 5-23. MibADC Operating Characteristics Over Full Range of Recommended Operating
Conditions (1)
PARAMETER
DESCRIPTION/CONDITIONS
Rmux
Rsamp
Cmux
Csamp
IAIL
IADREFHI
CR
Analog input mux on-resistance
ADC sample switch on-resistance
Input mux capacitance
ADC sample capacitance
Analog input leakage current
ADREFHI input current
Conversion range over which
specified accuracy is maintained
See Figure 5-21
See Figure 5-21
See Figure 5-21
See Figure 5-21
Input leakage per ADC input pin
ADREFHI = 3.6 V, ADREFLO = VSSAD
ADREFHI - ADREFLO
EDNL
Differential non-linearity error
Difference between the actual step
width and the ideal value (see
Figure 5-22).
Maximum deviation from the best
straight line through the MibADC.
EINL
Integral non-linearity error
MibADC transfer characteristics,
excluding the quantization error (see
Figure 5-23).
ETOT
Total error/Absolute accuracy
Maximum value of the difference
between an analog value and the
ideal midstep value (see Figure 5-24).
(1) 1 - LSB = (ADREFHI – ADREFLO)/ 210 for the MibADC.
MIN
-200
3
NOM
125
150
MAX
1.5K
1.5K
16
8
200
5
3.6
±2
UNIT
Ω
Ω
pF
pF
nA
mA
V
LSB
±2
LSB
±2
LSB
56
Peripheral Information and Electrical Specifications
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