PGA400-EP Datasheet, PDF (55/99 Pages) Texas Instruments – PRESSURE SENSOR SIGNAL CONDITIONER

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PGA400-EP
SLDS195B – MAY 2013 – REVISED FEBRUARY 2014
7.3.2 AFE Diagnostics Status (AFEDIAG)
AFE STATUS (AFEDIAG)
Not Bit Addressable
ESFR:
0x93
AFEDIAG
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
AFEDIAG[7] AFEDIAG[6] AFEDIAG[5] AFEDIAG[4] AFEDIAG[3] AFEDIAG[2] AFEDIAG[1] AFEDIAG[0]
Access
r
r
r
r
r
r
r
At
0
0
0
0
0
0
0
0
Bit Definitions
PSMON2
BIT 0:AFEDIAG[0]
1: Res Sensor Open / Short to Supply/ Short to Gnd
0: Normal
BIT 1:AFEDIAG[1]
1: AFE Stage1 Output / C2V Output Over Range Flag
0: Normal
BIT 2:AFEDIAG[2]
1: AFE Stage2 Output Over Range Flag
0: Normal
BIT 3:AFEDIAG[3]
1: Normal
0: ADC Input Over Range Flag
BIT 4:AFEDIAG[4]
-
BIT 5:AFEDIAG[5]
-
BIT 6:AFEDIAG[6]
-
BIT 7:AFEDIAG[7]
1: Capacitive Sensor Clock High/Low flag (Sensor fault Detection)
0: Normal
7.3.3 CPU Watchdog (CLKDIAG)
MICRO RESET (MICRORESET)
ESFR:
0x94
MICRORESET
BIT 7
BIT 6
BIT 5
Not Bit Addressable
BIT 4
BIT 3
-
-
-
-
-
Access
At
Reset
Bit Definitions
R
0
0
CLKDIAG
BIT 0:CPU_WD_RESET
BIT 1:
BIT 2:
BIT 3:
BIT 4:
BIT 5:
BIT 6:
BIT 7:
r
r
r
0
0
0
1: Microprocessor is in reset
0: Microprocessor is not reset
-
-
-
-
-
-
BIT 2
-
r
0
BIT 1
-
r
0
BIT 0
CPU_WD_RESE
T
r
0
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