DAC7718_14 Datasheet, PDF (52/64 Pages) Texas Instruments – Octal, 12-Bit, Low-Power, High-Voltage Output, Serial Input DIGITAL-TO-ANALOG CONVERTER

DAC7718
SBAS361A – MAY 2009 – REVISED DECEMBER 2009
www.ti.com
Zero Register n, where n = 0 to 7 (default = 000h).
The Zero Register stores the user-calibration data that are used to eliminate the offset error. The data are 12 bits
wide, 1 LSB/step, and the total adjustment is –2048 LSB to +2047 LSB, or ±50% of full-scale range. The Zero
Register uses a twos complement data format.
Table 14. Zero Register
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Z11 Z10 Z9
Z8
Z7
Z6
Z5
Z4
Z3
Z2
Z1
Z0
X
X
X
X
Z11:Z0—OFFSET BITS
7FFh
7FEh
••• ••• •••
001h
000h
FFFh
••• ••• •••
801h
800h
ZERO ADJUSTMENT
+2047 LSB
+2046 LSB
••• ••• •••
+1 LSB
0 LSB (default)
–1 LSB
••• ••• •••
–2047 LSB
–2048 LSB
BLANKSPACE
Gain Register n, where n = 0 to 7 (default = 800h).
The Gain Register stores the user-calibration data that are used to eliminate the gain error. The data are 12 bits
wide, 0.0015% FSR/step, and the total adjustment range 0.5 to 1.5. The Gain Register uses a straight binary
data format.
Table 15. Gain Register
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
G11 G10 G9
G8
G7
G6
G5
G4
G3
G2
G1
G0
X
X
X
X
G11:G0—GAIN-CODE BITS
FFFh
FFEh
••• ••• •••
801h
800h
7FFh
••• ••• •••
001h
000h
GAIN ADJUSTMENT COEFFICIENT
1.499985
1.499969
••• ••• •••
1.000015
1 (default)
0.999985
••• ••• •••
0.500015
0.5
52
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