TPS65014_15 Datasheet, PDF (50/69 Pages) Texas Instruments – Power- and Battery-Management IC

TPS65014
SLVS551A – DECEMBER 2004 – REVISED SEPTEMBER 2015
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7.5.15 MASK3 Register (offset: 0Fh) (reset: 00h)
The MASK3 register must be considered when any of the GPIO pins are programmed as inputs.
Figure 52. MASK3 Register
7
6
5
4
Edge trigger
GPIO4
Edge trigger
GPIO3
Edge trigger
GPIO2
Edge trigger
GPIO1
R/W-0
R/W-0
R/W-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
3
Mask GPIO4
R/W-0
2
Mask GPIO3
R/W-0
1
Mask GPIO2
R/W-0
0
Mask GPIO1
R/W-0
Table 29. MASK3 Register Field Descriptions
BIT FIELD
7-4 Edge trigger GPIOx
3-0 Mask GPIOx
TYPE
R/W
R/W
RESET
0h
0h
DESCRIPTION
Determines whether the respective GPIO generates an interrupt
at a rising or a falling edge.
0h = Falling edge triggered.
1h = Rising edge triggered.
Used to mask the corresponding interrupt. Default is unmasked
(mask GPIOx = 0).
7.5.16 DEFGPIO Register (offset = 10h) (reset: 00h)
The DEFGPIO register is used to define the GPIO pins to be either input or output.
Figure 53. DEFGPIO Register
7
6
5
4
IO4
IO3
IO2
IO1
R/W-0
R/W-0
R/W-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
3
Value GPIO4
R/W-0
2
Value GPIO3
R/W-0
1
Value GPIO2
R/W-0
0
Value GPIO1
R/W-0
BIT FIELD
7-4 IOx
3-0 Value GPIOx
Table 30. DEFGPIO Register Field Descriptions
TYPE
R/W
R/W
RESET
0h
0h
DESCRIPTION
0h = Sets the corresponding GPIO to be an input.
1h = Sets the corresponding GPIO to be an output.
If a GPIO is programmed to be an output, then the signal output
is determined by the corresponding bit. The output circuit for
each GPIO is an open-drain NMOS requiring an external pullup
resistor.
1h = Activates the relevant NMOS, hence forcing a logic low
signal at the GPIO pin.
0h = Turns the open-drain transistor OFF, hence the voltage at
the GPIO pin is determined by the voltage to which the pullup
resistor is connected.
If a particular GPIO is programmed to be an input, then the
contents of the relevant bit in B3-0 is defined by the logic level at
the GPIO pin. A logic low forces a 0 and a logic high forces a 1.
If a GPIO is programmed to be an input, then any attempt to
write to the relevant bit in B3-0 is ignored.
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