TPS54294 Datasheet, PDF (5/24 Pages) Texas Instruments – 2A Dual Channel Synchronous Step-Down Switcher with Integrated FET ( SWIFT™)

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TPS54294
SLVSB00B – OCTOBER 2011 – REVISED DECEMBER 2011
DEVICE INFORMATION
HTSSOP PACKAGE
(TOP VIEW)
1 _VIN1
VIN2 ¹⁶
2 _{VBST 1}
VBST2 ¹⁵
3 _SW1
SW 2 ¹⁴
4 _PGND1
5 EN1
6 PG1
7 VFB1
TPS54294
HTSSOP 16
(PowerPAD)
PGND 2 ¹³
EN2 ¹²
PG2 ¹¹
VFB2 ¹⁰
8 GND
VREG5 9
PIN
NAME
VIN1, VIN2
VBST1, VBST2
SW1, SW2
PGND1, PGND2
EN1, EN2
PG1, PG2
VFB1, VFB2
GND
VREG5
Exposed Thermal
Pad
NUMBER
1, 16
2, 15
3, 14
4, 13
5, 12
6, 11
7, 10
8
9
Back side
PIN FUNCTIONS⁽¹⁾
I/O
DESCRIPTION
I Power inputs and connects to both high side NFET drains.
Supply Input for 5.5V linear regulator.
I Supply input for high-side NFET gate drive circuit. Connect 0.1µF ceramic capacitor between
VBSTx and SWx pins. An internal diode is connected between VREG5 and VBSTx
I/O Switch node connections for both the high-side NFETs and low–side NFETs. Input of current
comparator.
I/O Ground returns for low-side MOSFETs. Input of current comparator.
I Enable. Pull High to enable according converter.
O Open drain power good output. Low means the output voltage of the corresponding output is
out of regulation.
I D-CAP2 feedback inputs. Connect to output voltage with resistor divider.
I/O Signal GND. Connect sensitive SSx and VFBx returens to GND at a single point.
O Output of 5.5V linear regulator. Bypass to GND with a high-quality ceramic capacitor of at least
1.0 µF. VREG5 is active when VIN1 is added .
I/O Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Must be
connected to GND.
(1) x means either 1 or 2, e.g. VFBx means VFB1 or VFB2.
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): TPS54294
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