 English |
|
|
|
|
|
|
|
| TPS2310_15 Datasheet, PDF (5/27 Pages) Texas Instruments – DUAL HOT-SWAP POWER CONTROLLERS WITH INTERDEPENDENT CIRCUIT BREAKER AND POWER-GOOD REPORTING | |||
| |||
| ◁ |
www.ti.com
RECOMMENDED OPERATING CONDITIONS
VI(IN1), VI(ISENSE1), VI(VSENSE1), VI(VSENSE2), VI(ISET1)
VI
Input voltage
VI(IN2), VI(ISENSE2), VI(ISET2), VI(VREG)
VI(ISENSE1), VI(ISET1), VI(VSENSE1)
VI(ISENSE2), VI(ISET2), VI(VSENSE2)
TJ Operating virtual junction temperature
TPS2310
TPS2311
SLVS275H â FEBRUARY 2000 â REVISED JULY 2013
MIN NOM MAX UNIT
3
13
3
5.5
V
VI(IN1)
VI(IN2)
â40
100 °C
ELECTRICAL CHARACTERISTICS
over recommended operating temperature range (â40°C < TA < 85°C), 3 V ⤠VI(IN1) â¤13 V, 3 V ⤠VI(IN2) ⤠5.5 V (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
GENERAL
II(IN1)
II(IN2)
II(stby)
Input current, IN1
Input current, IN2
Standby current (sum of
currents into IN1, IN2,
ISENSE1, ISENSE2,
ISET1, and ISET2)
VI(ENABLE) = 5 V (TPS2311),
VI(ENABLE) = 0 V (TPS2310)
VI(ENABLE) = 0 V (TPS2311),
VI(ENABLE) = 5 V (TPS2310)
0.5
1 mA
75 200 µA
5 µA
GATE1
VG(GATE1_3V)
VG(GATE1_4.5V)
VG(GATE1_10.8V)
VC(GATE1)
Gate voltage
II(GATE1) = 500 nA, DISCH1 open
Clamping voltage, GATE1
to DISCH1
VI(IN1) = 3 V
9 11.5
VI(IN1) = 4.5 V
10.5 14.5
V
VI(IN1) = 10.8 V 16.8
21
9
10
12
V
IS(GATE1)
tr(GATE1)
tf(GATE1)
GATE2
Source current, GATE1
Sink current, GATE1
Rise time, GATE1
Fall time, GATE1
3 V ⤠VI(IN1) ⤠13.2 V, 3 V ⤠VO(VREG) ⤠5.5 V,
VI(GATE1) = VI(IN1) + 6 V
3 V ⤠VI(IN1) ⤠13.2 V, 3 V ⤠VO(VREG) ⤠5.5 V,
VI(GATE1) = VI(IN1)
Cg to GND = 1 nF(1)
VI(IN1) = 3 V
VI(IN1) = 4.5 V
VI(IN1) = 10.8 V
Cg to GND = 1 nF(1)
VI(IN1) = 3 V
VI(IN1) = 4.5 V
VI(IN1) = 10.8 V
10
14
20 μA
50
75 100 µA
0.5
0.6
ms
1
0.1
0.12
ms
0.2
VG(GATE2_3V)
VG(GATE2_4.5V)
VC(GATE2)
Gate voltage
II(GATE2) = 500 nA, DISCH2 open
Clamping voltage, GATE2
to DISCH2
VI(IN2) = 3 V
9 11.7
V
VI(IN2) = 4.5 V
10.5 14.7
9
10
12
V
IS(GATE2)
tr(GATE2)
tf(GATE2)
Source current, GATE2
Sink current, GATE2
Rise time, GATE2
Fall time, GATE2
3 V ⤠VI(IN2) ⤠5.5 V, 3 V ⤠VO(VREG) ⤠5.5 V,
VI(GATE2) = VI(IN2) + 6 V
3 V ⤠VI(IN2) ⤠5.5 V, 3 V ⤠VO(VREG) ⤠5.5 V,
VI(GATE2) = VI(IN2)
Cg to GND = 1 nF(1)
Cg to GND = 1 nF(1)
VI(IN2) = 3 V
VI(IN2) = 4.5 V
VI(IN2) = 3 V
VI(IN2) = 4.5 V
VO(VREG) = 3 V
10
14
20 μA
50
75 100 µA
0.5
ms
0.6
0.1
ms
0.12
(1) Specified, but not production tested.
Copyright © 2000â2013, Texas Instruments Incorporated
Product Folder Links: TPS2310 TPS2311
Submit Documentation Feedback
5
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese