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TPD4S014 Datasheet, PDF (5/15 Pages) Texas Instruments – COMPLETE PROTECTION SOLUTION FOR USB CHARGER PORT INCLUDING ESD
TPD4S014
www.ti.com
GENERAL OPERATION
SLVSAU0A – MAY 2011 – REVISED JUNE 2011
The TPD4S014 provides a single-chip protection solution for USB charger interfaces. The VBUS line is tolerant
upto 28 V. A Low RDS(on) nFET switch is used to disconnect the downstream circuits in case of a fault condition.
At power-up, when the voltage on VBUS is rising, the switch will close 16 ms after the input crosses the
undervoltage threshold, thereby making power available to the downstream circuits. The TPD4S014 also has an
ACK output, which deasserts to alert the system that a fault has occurred. The TPD4S014 offers 4 channel ESD
clamps for D+, D-, ID, and VBUS pins that provide IEC61000-4-2 level 4 ESD protection. This eliminates the
need for external TVS clamp circuits in the application.
The TPD4S014 has an internal oscillator and charge pump that controls the turn-on of the internal nFET switch.
The internal oscillator controls the timers that enable the turn-on of the charge pump and sets the state of the
open-drain ACK output. If VBUS < VUVLO or if VBUS > VOVLO, the internal oscillator remains off, thus disabling the
charge pump. The charge-pump at startup, after a 16ms internal delay, turns on the internal nFET switch and
asserts ACK. At any time, if VBUS drops below VUVLO or rises above VOVLO, ACK is released and the nFET switch
is disabled.
When the input voltage rises above VOVP, or drops below the VUVLO, the internal VBUS switch is turned off,
removing power to the application. The ACK signal is asserted when a fault condition is detected. If the fault was
an over voltage event, the VBUS FET switch turns on 8ms after input voltage returns below VOVP – VHYS-OVP and
remains above VUVLO. If the fault was an under voltage event, the switch turns on 16ms after the voltage
returns above VUVLO+ (similar to start up). When the switch turns on, the ACK is asserted once again.
A 16ms deglitch time has been introduced in to the turn on sequence to ensure that the input supply has
stabilized before turning the switch ON. Noise on the Vbus line, could turn on the switch when the fault condition
is still active. To avoid this, OVP glitch immunity allows noise on the VBUS line to be rejected. Such a glitch
protection circuitry is also introduced in the turn off sequence in order to prevent the switch from turning off for
voltage transients. The glitch protection circuitry integrates the glitch over time, allowing the OVP circuitry to
trigger faster for larger voltage excursions above the OVP threshold and slower for shorter excursions. The
protection circuitry has a maximum delay of 8 µs.
When the device is ON, current flowing through the device will cause the device to heat up. Over heating can
lead to permanent damage to the device. To prevent this, an over temperature protection has been designed into
the device. Whenever the junction temperature exceeds 145 °C, the switch will turn off, thereby limiting the
temperature. The ACK signal will be asserted for an over temperature event. Once the device cools down to
below 120 °C the ACK signal will be deasserted, and the switch will turn on if the EN is active and the VBUS
voltage is within the UVLO and OVP thresholds. While the over temperature protection in the device will not
kick-in unless the die temperature reaches 145 °C, It is generally recommended that care is taken to keep the
junction temperature below 125 °C. Operation of the device above 125 °C for extended periods of time can affect
the long-term reliability of the part.
The junction temperature of the device can be calculated using below formula:
Tj = Ta + PDqJA
(1)
Tj = Junction temperature
Ta = Ambient temperature
θJA = Thermal resistance
PD = Power Dissipated in device
P = I2R
D
on
(2)
I
= Current through device
RON = Max on resistance of device
Copyright © 2011, Texas Instruments Incorporated
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