TLC548C_16 Datasheet, PDF (5/19 Pages) Texas Instruments – 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL

TLC548C, TLC548I, TLC549C, TLC549I
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL
SLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 1996
electrical characteristics over recommended operating free-air temperature range,
V_CC = V_ref+ = 4.75 V to 5.5 V, f_clock(I/O) = 2.048 MHz for TLC548 or 1.1 MHz for TLC549
(unless otherwise noted)
VOH
VOL
IOZ
IIH
IIL
II(on)
ICC
ICC + Iref
Ci
PARAMETER
High-level output voltage
Low-level output voltage
High-impedance off-state output current
High-level input current, control inputs
Low-level input current, control inputs
Analog channel on-state input current during sample
cycle
Operating supply current
Supply and reference current
Input capacitance
Analog inputs
Control inputs
TEST CONDITIONS
VCC = 4.75 V, IOH = – 360 µA
VCC = 4.75 V, IOL = 3.2 mA
VO = VCC,
CS at VCC
VO = 0,
CS at VCC
VI = VCC
VI = 0
Analog input at VCC
Analog input at 0 V
CS at 0 V
Vref+ = VCC
MIN TYP†
2.4
0.005
– 0.005
0.4
– 0.4
1.8
1.9
7
5
MAX
0.4
10
– 10
2.5
– 2.5
1
–1
2.5
3
55
15
UNIT
V
V
µA
µA
µA
µA
mA
mA
pF
operating characteristics over recommended operating free-air temperature range,
V_CC = V_ref+ = 4.75 V to 5.5 V, f_clock(I/O) = 2.048 MHz for TLC548 or 1.1 MHz for TLC549
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
TLC548
MIN TYP† MAX
TLC549
MIN TYP† MAX ^UNIT
EL
Linearity error
EZS
Zero-scale error
EFS
Full-scale error
Total unadjusted error
See Note 6
See Note 7
See Note 7
See Note 8
±0.5
±0.5 LSB
±0.5
±0.5 LSB
±0.5
±0.5 LSB
±0.5
±0.5 LSB
tconv
Conversion time
Total access and conversion time
See Operating Sequence
See Operating Sequence
8
17
12
22
12
17 µs
19
25 µs
ta
Channel acquisition time (sample cycle) See Operating Sequence
I/O
4
4 clock
cycles
tv
Time output data remains
valid after I/O CLOCK↓
10
10
ns
td
Delay time to data output valid
I/O CLOCK↓
200
400 ns
ten
Output enable time
1.4
1.4 µs
tdis
Output disable time
150
150 ns
tr(bus) Data bus rise time
See Figure 1
300
300 ns
tf(bus) Data bus fall time
300
† _{All typicals are at VCC = 5 V, TA = 25°C.}
NOTES: 6. Linearity error is the deviation from the best straight line through the A/D transfer characteristics.
300 ns
7. Zero-scale error is the difference between 00000000 and the converted output for zero input voltage; full-scale error is the difference
between 11111111 and the converted output for full-scale input voltage.
8. Total unadjusted error is the sum of linearity, zero-scale, and full-scale errors.
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