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SN74LVC1G08_16 Datasheet, PDF (5/38 Pages) Texas Instruments – SN74LVC1G08 Single 2-Input Positive-AND Gate
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SN74LVC1G08
SCES217Y – APRIL 1999 – REVISED APRIL 2014
6.3 Recommended Operating Conditions(1)
MIN
MAX UNIT
VCC
Supply voltage
Operating
Data retention only
1.65
5.5
V
1.5
VIH
High-level input voltage
VIL
Low-level input voltage
VI
Input voltage
VO
Output voltage
IOH
High-level output current
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
0.65 × VCC
1.7
V
2
0.7 × VCC
0.35 × VCC
0.7
V
0.8
0.3 × VCC
0
5.5 V
0
VCC
V
–4
–8
–16 mA
–24
IOL
Low-level output current
VCC = 4.5 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
–32
4
8
16 mA
24
Δt/Δv
Input transition rise or fall rate
TA
Operating free-air temperature
VCC = 4.5 V
VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
32
20
10 ns/V
5
–40
125 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
6.4 Thermal Information
THERMAL METRIC(1)
RθJA
RθJCtop
RθJB
ψJT
ψJB
RθJCbot
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
DBV
5 PINS
207.6
145.2
53.5
37.5
53.1
–
DCK
5 PINS
283.1
92.3
60.9
1.7
60.1
–
SN74LVC1G08
DRL
DRY
5 PINS
6 PINS
242.9
438.8
77.5
276.8
77.5
271.7
9.6
83.8
77.3
271.4
–
–
YZP
5 PINS
130
54
51
1
50
–
DPW
4 PINS
340
215
294
41
294
250
UNIT
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 1999–2014, Texas Instruments Incorporated
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