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SN74CB3T1G125_15 Datasheet, PDF (5/16 Pages) Texas Instruments – SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER
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Input Generator
50 W
VG1
Input Generator
50 W
VG2
SN74CB3T1G125
SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH
WITH 5-V-TOLERANT LEVEL SHIFTER
SCDS150A – OCTOBER 2003 – REVISED SEPTEMBER 2006
PARAMETER MEASUREMENT INFORMATION
VCC
VIN
50 W
VI
50 W
DUT
TEST CIRCUIT
VO
CL
(see Note A)
2 x VCC
RL
S1
Open
GND
RL
TEST
tpd(s)
t /t PLZ PZL
t /t PHZ PZH
VCC
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
S1
Open
Open
2 x VCC
2 x VCC
Open
Open
RL
500 W
500 W
500 W
500 W
500 W
500 W
VI
3.6 V or GND
5.5 V or GND
GND
GND
3.6 V
5.5 V
CL
30 pF
50 pF
30 pF
50 pF
30 pF
50 pF
VD
0.15 V
0.15 V
0.15 V
0.15 V
Output
Control
(VIN)
VCC/2
VCC
VCC/2
0V
Output
Control
(VIN)
tPZL
Output
Waveform 1
S1 at 2 x VCC
(see Note B)
VCC/2
VCC/2
VCC/2
tPLZ
VOL + VD
VCC
0V
VCC
VOL
Output
tPLH
tPHL
VOH
VCC/2
VCC/2
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (tpd(s))
tPZH
tPHZ
Output
Waveform 2
S1 at Open
(see Note B)
VCC/2
VOH – VD
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W, tr £ 2.5 ns,
tt £ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as t . pd(s) The tpd propagation delay is the calculated RC time constant of the typical ON-state
resistance of the switch nd the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
H. All parameters and waveforms are not applicable to all devices.
Figure 2. Test Circuit and Voltage Waveforms
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