LM3017 Datasheet, PDF(5/13 Page) Texas Instruments – High Efficiency Low-Side Controller with True Shutdown

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LM3017 Datasheet, PDF (5/13 Pages) Texas Instruments – High Efficiency Low-Side Controller with True Shutdown

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Functional Block Diagram

Functional Description

The LM3017 uses a fixed frequency, Pulse Width Modulated

(PWM), current mode control architecture. In a typical appli-

cation circuit, the peak current through the external high side

MOSFET is sensed through an external sense resistor. The

voltage across this resistor is fed into the ISEN pin. This voltage

is then level shifted and fed into the positive input of the PWM

comparator. The output voltage is also sensed through an

external feedback resistor divider network and fed into the

error amplifier (EA) negative input (feedback pin, FB). The

output of the error amplifier (COMP pin) is added to the slope

compensation ramp and fed into the negative input of the

PWM comparator.

At the start of any switching cycle, the oscillator sets a high

signal on the DR pin (gate of the external MOSFET) and the

external MOSFET turns on. When the voltage on the positive

input of the PWM comparator exceeds the negative input, the

Drive Logic is reset and the external MOSFET turns off.

The voltage sensed across the sense resistor generally con-

tains spurious noise spikes, as shown in Figure 1. These

spikes can force the PWM comparator to reset the RS latch

prematurely. To prevent these spikes from resetting the latch,

a blank-out circuit inside the IC prevents the PWM comparator

from resetting the latch for a short duration after the latch is

set. This duration, called the blank-out time, is typically 250

ns and is specified as Tmin (on) in the electrical characteristics

section.

30180906

Under extremely light load or no-load conditions, the energy

delivered to the output capacitor when the external MOSFET

is on during the blank-out time is more than what is delivered

to the load. An over-voltage comparator inside the LM3017

prevents the output voltage from rising under these conditions

by sensing the feedback (FB pin) voltage and resetting the

RS latch. The latch remains in a reset state until the output

decays to the nominal value. Thus the operating frequency

decreases at light loads, resulting in excellent efficiency.

30180907

FIGURE 1. Basic Operation of the PWM comparator

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