INA233 Datasheet, PDF (5/48 Pages) Texas Instruments – High-Side or Low-Side Measurement, Bidirectional Current and Power Monitor With I2C-, SMBus-, and PMBus-Compatible Interface

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INA233
SBOS790 – APRIL 2017
6.5 Electrical Characteristics
at T_A = 25°C, V_VS = 3.3 V, V_IN+ = 12 V, V_SENSE = (V_IN+ – V_IN–) = 0 mV, and V_VBUS = 12 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
INPUT
Shunt voltage input range
Bus voltage input range⁽¹⁾
–81.92
0
81.9175
36
CMRR
V_OS
Common-mode rejection ratio
Offset voltage, RTI⁽²⁾
0 V ≤ V_IN+ ≤ 36 V
Shunt voltage
Bus voltage
126
140
±2.5
±10
±1.25
±7.5
PSRR
V_OS (RTI⁽²⁾) vs temperature
Power-supply rejection ratio (RTI⁽²⁾)
Shunt voltage, –40°C ≤ T_A ≤ +125°C
Bus voltage, –40°C ≤ T_A ≤ +125°C
Shunt voltage, 2.7 V ≤ V_S ≤ 5.5 V
Bus voltage
0.02
0.1
10
40
1
0.5
I_B
Input bias current (I_IN+, I_IN– pins)
8
VBUS input impedance
830
Input leakage⁽³⁾
(IN+) + (IN–),
power-down mode
0.1
0.5
DC ACCURACY
ADC native resolution
16
Shunt voltage
2.5
1-LSB step size
Bus voltage
1.25
Shunt voltage gain error
0.02%
0.1%
Shunt voltage gain error vs
temperature
–40°C ≤ T_A ≤ +125°C
5
25
Bus voltage gain error
0.02%
0.1%
Bus voltage gain error vs
temperature
–40°C ≤ T_A ≤ +125°C
10
50
Power gain error
V_BUS = 12 V, V_IN+ – V_IN– = –80 mV
to 80 mV
0.05%
0.2%
DNL
Power gain error vs temperature
Differential nonlinearity
–40°C ≤ T_A ≤ +125°C
10
50
±0.1
CT bit = 000
140
154
CT bit = 001
204
224
CT bit = 010
332
365
t_CT
ADC conversion time
CT bit = 011
CT bit = 100
588
646
1.1
1.21
CT bit = 101
2.116
2.328
CT bit = 110
4.156
4.572
CT bit = 111
8.244
9.068
SMBus
SMBus timeout⁽⁴⁾
28
35
UNIT
mV
V
dB
µV
mV
µV/°C
µV/V
mV/V
μA
kΩ
µA
Bits
μV
mV
ppm/°C
ppm/°C
ppm/°C
LSB
µs
ms
ms
(1) Although the input range is 36 V, the full-scale range of the ADC scaling is 40.96 V; see the High-Accuracy Analog-to-Digital Convertor
(ADC) section. Do not apply more than 36 V.
(2) RTI = Referred-to-input.
(3) Input leakage is positive (current flowing into the pin) for the conditions shown at the top of this table. Negative leakage currents can
occur under different input conditions.
(4) SMBus timeout in the INA233 resets the interface whenever SCL is low for more than 28 ms.
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