DS90LV031AQML Datasheet, PDF (5/14 Pages) Texas Instruments – DS90LV031AQML 3V LVDS Quad CMOS Differential Line Driver

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: Derate (W & WG packages) at 6.8mW/°C for temperatures above +25°C.
Note 3: Human body model, 1.5 kΩ in series with 100 pF
Note 4: Tested during V_OH/V_OL tests.
Note 5: Channel to Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the same chip with any
event on the inputs.
Note 6: Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
Note 7: FOR ADDITIONAL DIE INFORMATION, PLEASE VISIT THE HI REL WEB SITE AT: www.national.com/analog/space/level_die
Parameter Measurement Information
FIGURE 1. Driver V_OD and V_OS Test Circuit
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FIGURE 2. Driver Propagation Delay and Transition Time Test Circuit
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