DS90CR217_13 Datasheet, PDF (5/18 Pages) Texas Instruments – +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 85 MHz

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AC Timing Diagrams
DS90CR217
SNLS226A – OCTOBER 2006 – REVISED FEBRUARY 2013
Figure 3. “Worst Case” Test Pattern
Figure 4. DS90CR217 (Transmitter) LVDS Output Load and Transition Times
Figure 5. D590CR217 (Transmitter) Input Clock Transition Time
Measurements at V_DIFF = 0V
TCCS measured between earliest and latest LVDS edges
TxCLK Differential Low→High Edge
Figure 6. DS90CR217 (Transmitter) Channel-to-Channel Skew
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