CDC340_08 Datasheet, PDF (5/8 Pages) Texas Instruments – 1Line to 8Line Clock Driver

CDC340
1-LINE TO 8-LINE CLOCK DRIVER
SCAS332B – DECEMBER 1992 – REVISED MAY 1997
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500 Ω
LOAD CIRCUIT
Input
(see Note B)
tPLH
1.5 V
Output
1.5 V
0.8 V
tr
1.5 V
3V
0V
tPHL
2V
VOH
1.5 V
0.8 V _VOL
tf
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
Figure 1. Load Circuit and Voltage Waveforms
A
1G
2G
1Yn
tPLH1
tPHL1
2Yn
tPLH2
tPHL2
NOTES: A. Output skew, tsk(o), is calculated as the greater of:
– The difference between the fastest and slowest of tPLHn (n = 1, 2)
– The difference between the fastest and slowest of tPHLn (n = 1, 2)
B. Pulse skew, tsk(p), is calculated as the greater of | tPLHn – tPHLn | (n = 1, 2).
C. Process skew, tsk(pr), is calculated as the greater of:
– The difference between the fastest and slowest of tPLHn (n = 1, 2) across multiple devices under identical operating conditions
– The difference between the fastest and slowest of tPHLn (n = 1, 2) across multiple devices under identical operating conditions
Figure 2. Waveforms for Calculation of t_sk(o), t_sk(p), t_sk(pr)
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