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CD74HC4017-EP Datasheet, PDF (5/15 Pages) Texas Instruments – HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS
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CD74HC4017ĆEP
HIGHĆSPEED CMOS LOGIC DECADE COUNTER/DIVIDER
WITH 10 DECODED OUTPUTS
SCLS550 − DECEMBER 2003
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
tpd
tt
fmax
FROM
(INPUT)
CP
CE
MR
CP
TO
(OUTPUT)
Decade out
TC
Decade out
TC
Decade out
TC
TC, Decade out
LOAD
CAPACITANCE
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
VCC
2V
4.5 V
6V
5V
2V
4.5 V
6V
5V
2V
4.5 V
6V
5V
2V
4.5 V
6V
5V
2V
4.5 V
6V
5V
2V
4.5 V
6V
5V
2V
4.5 V
6V
5V
TA = 25°C
MIN TYP MAX
230
46
39
19
230
46
39
19
250
50
43
21
250
50
43
21
230
46
39
19
230
46
39
19
75
15
13
60
MIN MAX UNIT
345
69
59
345
69
59
375
75
64
ns
375
75
64
345
69
59
345
69
59
110
22 ns
19
MHz
operating characteristics, VCC = 5 V, TA = 25°C, input tr, tf = 6 ns, CL = 15 pF
PARAMETER
Cpd Power dissipation capacitance (see Note 4)
NOTE 4: Cpd is used to determine the dynamic power consumption per package.
PD = (Cpd × VCC2 × fi) + Σ(CL × VCC2 × fO)
fI = input frequency
fO = output frequency
CL = output load capacitance
VCC = supply voltage
TYP UNIT
39 pF
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