BQ2002C_11 Datasheet, PDF (5/17 Pages) Texas Instruments – NiCd/NiMH Fast-Charge Management IC

bq2002C
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PVD and -∆V Termination
There are two modes for voltage termination, depending on
the state of TM. For -∆V (TM = high), if VBAT is lower than any
previously measured value by 12mV ±3mV, fast charge is
terminated. For PVD (TM = low or mid), a decrease of 2.5mV
±2.5mV terminates fast charge. The PVD and -∆V tests are
valid in the range 1V<VBAT <2V.
Synchronized Voltage Sampling
Voltage sampling at the BAT pin for PVD and -∆V termination
may be synchronized to an external stimulus using the INH
input. Low-high-low input pulses between 100ns and 3.5ms in
width must be applied at the INH pin with a frequency
greater than the “maximum synchronized sampling period”
set by the state of the TM pin as shown in Table 1. Voltage is
sampled on the falling edge of such pulses. If the time between
pulses is greater than the synchronizing period, voltage
sampling “free-runs” at once every 17 seconds. A sample is
taken by averaging together voltage measurements taken
57µs apart. The IC takes 32 measurements in PVD mode and
16 measurements in -∆V mode. The resulting sample periods
(9.17 and 18.18ms, respectively) filter out harmonics centered
around 55 and 109Hz. This technique minimizes the effect of
any AC line ripple that may feed through the power supply
from either 50 or 60Hz AC sources. If the INH input remains
high for more than 12ms, the voltage sample history kept by
the IC and used for PVD and -∆V termination decisions is
erased and a new history is started. Such a reset is required
when transitioning from free-running to synchronized voltage
sampling. The response of the IC to pulses less than 100ns in
width or between 3.5ms and 12ms is indeterminate. The
tolerance on all timing is ±12%.
Voltage Termination Hold-off
A hold-off period occurs at the start of fast charging. During
the hold-off time, the PVD and -∆V terminations are disabled.
This avoids premature termination on the voltage spikes
sometimes produced by older batteries when fast-charge
current is first applied. Maximum voltage and temperature
terminations are not affected by the hold-off period.
Maximum Voltage, Temperature, and Time
Any time the voltage on the BAT pin exceeds the maximum
cell voltage, VMCV, fast charge is terminated.
Maximum temperature termination occurs anytime the
voltage on the TS pin falls below the temperature cut-off
threshold VTCO, where
VTCO = 0.5 x VCC ± 5%.
Maximum charge time is configured using the TM pin. Time
settings are available for corresponding charge rates of C/2,
1C, and 2C. Maximum time-out termination is enforced on the
fast-charge phase. There is no time limit on the trickle-charge
phase.
Pulse-Trickle Charge
Pulse-trickle is used to compensate for self-discharge while
the battery is idle in the charger. The battery is pulse-trickle
charged by driving the CC pin active once per second for the
period specified in Table 1. This results in a trickle rate of
C/32.
TM Pin
The TM pin is a three-level pin used to select the charge
timer, voltage termination mode, trickle rate, and voltage
hold-off period options. Table 1 describes the states selected
by the TM pin. The mid-level selection input is developed by a
resistor divider between VCC and ground that fixes the voltage
on TM at VCC/2 ± 0.5V. See Figure 4.
Charge Status Indication
A fast charge in progress is uniquely indicated when the LED
pin goes low. In the charge pending state, the LED pin is
driven low for 500ms, then to high-Z for 500ms. The LED pin
is driven to the high-Z state for all other conditions. Figure 2
outlines the state of the LED pin during charge.
Charge Inhibit
Fast charge may be inhibited by using the INH pin. When
high, INH suspends all fast charge activity and the internal
charge timer. INH freezes the current state of LED until
inhibit is removed. Temperature monitoring is not affected by
the INH pin. During charge inhibit, the bq2002C continues to
pulse-trickle charge the battery per the TM selection. When
INH returns low, charge control and the charge timer resume
from the point where INH became active.
Low-Power Mode
The IC enters a low-power state when VBAT is driven above
the power-down threshold (VPD) where:
VPD = VCC - (1V ±0.5V)
Both the CC pin and the LED are driven to the high-Z state.
The operating current is reduced to less than 1µA in this
mode. When VBAT returns to a value below VPD, the IC pulse-
trickle charges until the next new charge cycle begins.
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