RM42L432_15 Datasheet, PDF (46/108 Pages) Texas Instruments – 16- and 32-Bit RISC Flash Microcontroller

RM42L432
SPNS180B – SEPTEMBER 2012 – REVISED JUNE 2015
www.ti.com
MODULE NAME
FRAME CHIP
SELECT
N2HET RAM
PCS[35]
HTU RAM
PCS[39]
CoreSight Debug
ROM
CSCS0
Cortex-R4 Debug CSCS1
HTU
PS[22]
N2HET
PS[17]
GIO
PS[16]
MIBADC
PS[15]
DCAN1
PS[8]
DCAN2
PS[8]
LIN
PS[6]
MibSPI1
PS[2]
SPI2
PS[2]
SPI3
PS[1]
EQEP
PS[25]
EQEP (Mirrored) PS2[25]
VIM RAM
PPCS2
Flash Wrapper
eFuse Farm
Controller
PPCS7
PPCS12
PCR registers
PPS0
System Module -
Frame 2 (see
PPS0
device TRM)
PBIST
PPS1
STC
IOMM
Multiplexing
control module
PPS1
PPS2
Table 6-17. Device Memory Map (continued)
ADDRESS RANGE
START
END
FRAME ACTUAL
SIZE
SIZE
0xFF46_0000
0xFF47_FFFF 128KB
16KB
0xFF4E_0000 0xFF4F_FFFF 128KB
1KB
Debug Components
0xFFA0_0000 0xFFA0_0FFF 4KB
4KB
0xFFA0_1000 0xFFA0_1FFF 4KB
Peripheral Control Registers
0xFFF7_A400 0xFFF7_A4FF 256B
4KB
256B
0xFFF7_B800 0xFFF7_B8FF 256B
256B
0xFFF7_BC00 0xFFF7_BCFF 256B
256B
0xFFF7_C000 0xFFF7_C1FF 512B
512B
0xFFF7_DC00 0xFFF7_DDFF 512B
512B
0xFFF7_DE00 0xFFF7_DFFF 512B
512B
0xFFF7_E400 0xFFF7_E4FF 256B
256B
0xFFF7_F400
0xFFF7_F5FF 512B
512B
0xFFF7_F600
0xFFF7_F7FF 512B
512B
0xFFF7_F800
0xFFF7_F9FF 512B
512B
0xFFF7_9900
0xFFF7_99FF 256B
256B
0xFCF7_9900 0xFCF7_99FF 256B
256B
System Modules Control Registers and Memories
0xFFF8_2000
0xFFF8_2FFF
4KB
1KB
0xFFF8_7000
0xFFF8_7FFF
4KB
4KB
RESPONSE FOR ACCESS TO
UNIMPLEMENTED LOCATIONS IN
FRAME
Wrap around for accesses to
unimplemented address offsets lower
than 0x3FFF. Abort generated for
accesses beyond 0x3FFF.
Abort
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
Wrap around for accesses to
unimplemented address offsets lower
than 0x3FF. Accesses beyond 0x3FF
will be ignored.
Abort
0xFFF8_C000 0xFFF8_CFFF 4KB
4KB
Abort
0xFFFF_E000 0xFFFF_E0FF 256B
256B
Reads return zeros, writes have no
effect
0xFFFF_E100 0xFFFF_E1FF 256B
256B
Reads return zeros, writes have no
effect
0xFFFF_E400
0xFFFF_E600
0xFFFF_E5FF
0xFFFF_E6FF
512B
256B
512B
256B
Reads return zeros, writes have no
effect
Reads return zeros, writes have no
effect
0xFFFF_EA00 0xFFFF_EBFF 512B
512B
Generates address error interrupt if
enabled.
46
System Information and Electrical Specifications
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