ADS58B18_11 Datasheet, PDF (45/68 Pages) Texas Instruments – 11-Bit, 200MSPS/9-Bit, 250MSPS, Ultralow-Power ADCs with Analog Buffer

ADS58B18
ADS58B19
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SBAS487D – NOVEMBER 2009 – REVISED JANUARY 2011
Drive Circuit Requirements
The primary advantage of the buffered analog inputs is the isolation of the external drive source from the
switching currents of the sampling circuit. The filtering of the glitches with an external R-C-R filter, as suggested
for the ADS4149 family, is not required. Using a simple drive circuit, it is possible to obtain uniform performance
over a wide frequency range.
For optimum performance, the analog inputs must be driven differentially. This configuration improves the
common-mode noise immunity and even-order harmonic rejection. A small resistor (5Ω to 10Ω) in series with
each input pin is recommended to damp out ringing caused by package parasitics.
Figure 59 and Figure 60 show the differential impedance (Z_IN = R_IN || C_IN) seen by looking into the ADC input
pins. The presence of the analog input buffer results in an almost constant input capacitance up to 1GHz.
100
10
1
0.1
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Input Frequency (GHz)
Figure 59. ADC Analog Input Resistance (R_IN) Across Frequency
2.5
2.25
2
1.75
1.5
1.25
1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Input Frequency (GHz)
Figure 60. ADC Analog Input Capacitance (C_IN) Across Frequency
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