ADS9120 Datasheet, PDF (44/64 Pages) Texas Instruments – 16-Bit, 2.5-MSPS, 15.5-mW, SAR ADC

ADS9120
SBAS710 – SEPTEMBER 2016
7.6 Register Maps
7.6.1 Device Configuration and Register Maps
The device features four configuration registers, mapped as described in Table 8.
ADDRESS
010h
014h
018h
01Ch
REGISTER
NAME
PD_CNTL
SDI_CNTL
SDO_CNTL
DATA_CNTL
Table 8. Configuration Registers Mapping
REGISTER FUNCTION
Low-power modes control register
SDI input protocol selection register
SDO output protocol selection register
Output data word configuration register
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SECTION
PD Control
SDI Control
SDO Control
DATA Control
7.6.1.1 PD_CNTL Register (address = 010h)
This register controls the low-power modes offered by the device and is protected using a key.
Any writes to the PD_CNTL register must be preceded by a write operation with the register address set to 011h
and the register data set to 69h.
Figure 88. PD_CNTL Register
7
6
5
4
0
0
0
0
R-0b
R-0b
R-0b
R-0b
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
3
0
R-0b
2
0
R-0b
1
NAP_EN
R/W-0b
0
PDWN
R/W-0b
Bit Field
7-2 0
1
NAP_EN
0
PDWN
Table 9. PD_CNTL Register Field Descriptions
Type
R
R/W
R/W
Reset
000000b
0b
0b
Description
Reserved bits. Reads return 000000b.
This bit enables NAP mode for the device.
0b = NAP mode is disabled
1b = NAP mode is enabled
This bit outputs the device in power-down mode.
0b = Device is powered up
1b = Device is powered down
7.6.1.2 SDI_CNTL Register (address = 014h)
This register configures the protocol used for writing data into the device.
Figure 89. SDI_CNTL Register
7
6
5
4
0
0
0
0
R-0b
R-0b
R-0b
R-0b
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
3
0
R-0b
2
0
R-0b
1
0
SDI_MODE[1:0]
R/W-0b
Bit Field
7-2 0
1-0 SDI_MODE[1:0]
Table 10. SDI_CNTL Register Field Descriptions
Type
R
R/W
Reset
000000b
00b
Description
Reserved bits. Reads return 000000b.
These bits select the protocol for writing data into the device.
00b = Standard SPI with CPOL = 0 and CPHASE = 0
01b = Standard SPI with CPOL = 0 and CPHASE = 1
10b = Standard SPI with CPOL = 1 and CPHASE = 0
11b = Standard SPI with CPOL = 1 and CPHASE = 1
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