DP83848Q Datasheet, PDF (43/74 Pages) Texas Instruments – PHYTER Extended Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver

13.2 EXTENDED REGISTERS
13.2.1 PHY Status Register (PHYSTS)
This register provides a single location within the register set for quick access to commonly accessed information.
Bit
Bit Name
15
RESERVED
14
MDIX MODE
13 RECEIVE ERROR
LATCH
12 POLARITY STATUS
11
FALSE CARRIER
SENSE LATCH
10
SIGNAL DETECT
9 DESCRAMBLER LOCK
8
PAGE RECEIVED
7
RESERVED
6
REMOTE FAULT
5
JABBER DETECT
TABLE 21. PHY Status Register (PHYSTS), address 10h
Default
0, RO
0, RO
0, RO/LH
0, RO
0, RO/LH
0, RO/LL
0, RO/LL
0, RO
0, RO
0, RO
0, RO
Description
RESERVED: Writes ignored, read as 0.
MDIX mode as reported by the Auto-Negotiation logic:
This bit will be affected by the settings of the MDIX_EN and FORCE_MDIX
bits in the PHYCR register. When MDIX is enabled, but not forced, this bit will
update dynamically as the Auto-MDIX algorithm swaps between MDI and
MDIX configurations.
1 = MDI pairs swapped
(Receive on TPTD pair, Transmit on TPRD pair)
0 = MDI pairs normal
(Receive on TRD pair, Transmit on TPTD pair)
Receive Error Latch:
This bit will be cleared upon a read of the RECR register.
1 = Receive error event has occurred since last read of RXERCNT (address
15h, Page 0).
0 = No receive error event has occurred.
Polarity Status:
This bit is a duplication of bit 4 in the 10BTSCR register. This bit will be cleared
upon a read of the 10BTSCR register, but not upon a read of the PHYSTS
register.
1 = Inverted Polarity detected.
0 = Correct Polarity detected.
False Carrier Sense Latch:
This bit will be cleared upon a read of the FCSR register.
1 = False Carrier event has occurred since last read of FCSCR (address 14h).
0 = No False Carrier event has occurred.
100Base-TX qualified Signal Detect from PMA:
This is the SD that goes into the link monitor. It is the AND of raw SD and
descrambler lock, when address 16h, bit 8 (page 0) is set. When this bit is
cleared, it will be equivalent to the raw SD from the PMD.
100Base-TX Descrambler Lock from PMD.
Link Code Word Page Received:
This is a duplicate of the Page Received bit in the ANER register, but this bit
will not be cleared upon a read of the PHYSTS register.
1 = A new Link Code Word Page has been received. Cleared on read of the
ANER (address 06h, bit 1).
0 = Link Code Word Page has not been received.
RESERVED: Writes ignored, read as 0.
Remote Fault:
1 = Remote Fault condition detected (cleared on read of BMSR (address 01h)
register or by reset). Fault criteria: notification from Link Partner of Remote
Fault via Auto-Negotiation.
0 = No remote fault condition detected.
Jabber Detect: This bit only has meaning in 10 Mb/s mode.
This bit is a duplicate of the Jabber Detect bit in the BMSR register, except
that it is not cleared upon a read of the PHYSTS register.
1 = Jabber condition detected.
0 = No Jabber.
www.national.com
42