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TMS380C26 Datasheet, PDF (42/92 Pages) Texas Instruments – NETWORK COMMPROCESSOR
TMS380C26
NETWORK COMMPROCESSOR
SPWS010A–APRIL 1992–REVISED MARCH 1993
PARAMETER MEASUREMENT INFORMATION
memory bus timing: write cycle
tM is the cycle time of one-eighth of a local memory cycle (31.25 ns minimum)
NO.
PARAMETER
MIN
58 Setup time of MW low before MRAS no longer low
60 Setup time of MW low before MCAS no longer low
63 Setup time of valid data/parity before MW no longer high
64 Pulse duration of MW low
65 Hold time of data/parity out valid after MW high
66 Setup time of address valid on MAX0, MAX2, and MROMEN before MW no longer low
67 Hold time from MRAS low to MW no longer low
69 Hold time from MCAS low to MW no longer low
70 Setup time of MBEN low before MW no longer high
71 Hold time of MBEN low after MW high
72 Setup time of MDDIR high before MBEN no longer high
73 Hold time of MDDIR high after MBEN high
1.5tM – 9
1.5tM – 6.5
0.5tM –11.5
2.5tM – 9
0.5tM – 10.5
7tM –11.5
5.5tM – 9
4tM –11.5
1.5tM – 13.5
0.5tM – 6.5
2tM – 9
1.5tM – 12
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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