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| LMX2487 Datasheet, PDF (41/49 Pages) National Semiconductor (TI) – 3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum™ Frequency Synthesizers with 3.0 GHz Integer PLL | |||
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www.ti.com
LMX2487
SNAS322C â FEBRUARY 2006 â REVISED JANUARY 2016
9.2.1 Design Requirements
Table 50 lists the design parameters of the LMX2487.
BW
PM
T3/T1
T4/T3
KPD
fPD
fVCO
Vcc
KVCO
CVCO
C1_LF
C2_LF
C3_LF
C4_LF
R2_LF
R3_LF
R4_LF
PARAMETER
Phase Margin
Loop Bandwidth
Pole Ratio T3/T1
Pole Ratio T4/T3
Kf
Comparison Frequency
Output Frequency
Supply
VCO Gain
VCO Input Capacitance
Loop Filter Components
Table 50. Design Requirements
VALUE
48.6 degrees
9.3 KHz
39.70%
39.20%
8X (760 µA)
20 MHz
6000-6030
3V
20 MHz/V
50 pF
2.2 nF
39 nF
220 pf
100 pF
1.2 kΩ
4.7 kΩ
10 kΩ
9.2.2 Detailed Design Procedure
The design of the loop filter involves balancing requirements of lock time, spurs, and phase noise. This design is
fairly involved, but the TI website has references, design tools, and simulation tools cover the loop filter design
and simulation in depth.
9.2.3 Application Curves
Figure 25. Phase Noise
Figure 26. Fractional Spurs at 200 kHz
Copyright © 2006â2016, Texas Instruments Incorporated
Product Folder Links: LMX2487
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