DLPA1000 Datasheet, PDF (41/47 Pages) Texas Instruments – Power Management and LED Driver IC

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10.2 Layout Example
Place L2 (VLED)
as close to the IC
as possible. Route
on top level and
avoid vias. Max
current is 2 A.
C6 and C7
should be placed
close to the IC
(supply caps).
Keep traces
separated and
star-connect to
system power.
Place L1 as
close to the IC as
possible. Max
trace current is
200 mA.
Place C9 and
C10 (VLED) as
close to the IC as
possible. Use
wide metal (1 A
current) and
avoid vias.
Place C3 (V6V)
close to IC and
route on top metal.
This is low-current
trace.
Place C2 (supply
cap) as close to
the IC as possible.
Star-connect to
system power.
Figure 38. Layout
DLPA1000
SLVSDP7 – FEBRUARY 2017
Place D6 close to
L1 and C8 close
to D6.
Keep trace from
R27 to pin [B6]
shielded from
[A5]-L1 trace as
much as possible
to avoid noise
coupling.
Place C11, and
C12, (VBIAS,
VOFS) close to
the IC. Average
current is <5 mA.
Place C1, as
close to the IC as
possible. This is
an internal
reference pin and
needs to be
shielded from
noise.
Keep trace [F5]
R34 separated from
trace [F6, F7] - R34
and connect them
directly at R34. R34
is the LED sense
resistor.
Table 29. Layout Components
LABEL
C1
C2
C3
C6
C7
C8
C9
C10
C11
C12
D6
L1
L2
R27
R34
DESCRIPTION
V2V5 output filter cap
VINA input cap
V6V output filter cap
VINL input cap
VINR input cap
VRST output filter cap
VLED output filter cap
VLED output filter cap
VBIAS output filter cap
VOFS output filter cap
VRST rectifying diode
DMD supply inductor
VLED buck-boost inductor
100k VRST feedback resistor
100m RLIM sense resistor
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