TAS5760MD Datasheet, PDF (40/72 Pages) Texas Instruments – Check for Samples: TAS5760MD

TAS5760MD
SLOS741C – MAY 2013 – REVISED MARCH 2015
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8.4.2.5.3 Writing to the I²C Control Port
As shown in Figure 51, a single-byte data-write transfer begins with the master device transmitting a START
condition followed by the I²C and the read/write bit. The read/write bit determines the direction of the data
transfer. For a data-write transfer, the read/write bit is a 0. After receiving the correct I²C and the read/write bit,
the TAS5760MD responds with an acknowledge bit. Next, the master transmits the address byte corresponding
to the TAS5760MD register being accessed. After receiving the address byte, the TAS5760MD again responds
with an acknowledge bit. Next, the master device transmits the data byte to be written to the memory address
being accessed. After receiving the data byte, the TAS5760MD again responds with an acknowledge bit. Finally,
the master device transmits a STOP condition to complete the single-byte data-write transfer.
Start
Condition
Acknowledge
Acknowledge
Acknowledge
A6 A5 A4 A3 A2 A1 A0 R/W ACK A7 A6 A5 A4 A3 A2 A1 A0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK
I²C Device Address and
Read/Write Bit
Subaddress
Figure 51. Write Transfer
Data Byte
Stop
Condition
T0036-01
8.4.2.5.4 Reading from the I²C Control Port
As shown in Figure 52, a data-read transfer begins with the master device transmitting a START condition,
followed by the I²C device address and the read/write bit. For the data read transfer, both a write followed by a
read are actually done. Initially, a write is done to transfer the address byte of the internal register to be read. As
a result, the read/write bit becomes a 0. After receiving the TAS5760MD address and the read/write bit,
TAS5760MD responds with an acknowledge bit. In addition, after sending the internal memory address byte or
bytes, the master device transmits another START condition followed by the TAS5760MD address and the
read/write bit again. This time, the read/write bit becomes a 1, indicating a read transfer. After receiving the
address and the read/write bit, the TAS5760MD again responds with an acknowledge bit. Next, the TAS5760MD
transmits the data byte from the register being read. After receiving the data byte, the master device transmits a
not-acknowledge followed by a STOP condition to complete the data-read transfer.
Start
Condition
Acknowledge
Repeat Start
Condition
Acknowledge
Acknowledge
Not
Acknowledge
A6 A5
A1 A0 R/W ACK A7 A6 A5 A4
A0 ACK
A6 A5
A1 A0 R/W ACK D7 D6
D1 D0 ACK
I²C Device Address and
Read/Write Bit
Subaddress
I²C Device Address and
Read/Write Bit
Figure 52. Read Transfer
Data Byte
Stop
Condition
T0036-03
8.5 Register Maps
8.5.1 Control Port Registers - Quick Reference
Adr. Adr.
(Dec) (Hex)
Register Name
0
0
Device
Identification
1
1 Power Control
Table 8. Control Port Quick Reference Table
Default (Binary)
B7
B6
B5
B4
B3
B2
Device Identification
0
0
0
0
0
0
DigClipLev[19:14]
1
1
1
1
1
1
Default
B1
B0
(Hex)
0
SPK_SL
EEP
0
0
SPK_SD
1
0x00
0xFD
40
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