UCC3585M Datasheet, PDF (4/21 Pages) Texas Instruments – LOW-VOLTAGE SYNCHRONOUS BUCK CONTROLLER

UCC2585
UCC3585
SLUS304F − JULY 1999 − REVISED JANUARY 2005
electrical characteristics, these specifications hold for T_A = 05C to 855C for the UCC3585 and
T_A = −405C to 855C for the UCC2585, T_A = T_J, V_IN = 3.3 V, V_ENB, V_ISENSE = V_IN, V_FB = 0.9 V,
V_COMP = 1.5 V, C_T = 330 pF, R_ISET = 100 kΩ, R_CLSET = 10 kΩ, (unless otherwise noted)
current limit
PARAMETER
Comparator offset voltage
CLSET current
SD sink current
SD source current
Restart threshold
TEST CONDITIONS
VIN = 3.3 V,
VIN = 5 V,
VIN = 3.3 V,
VIN = 5 V,
SD = 2 V,
SD = 2 V,
SD = 2 V
Measured on SD
TA = 0°C to 85°C
TA = 0°C to 85°C
TA = −40°C to 85°C
TA = −40°C to 85°C
TA = 0°C to 85°C
TA = −40°C to 85°C
MIN
−25
10.0
11.0
9.0
9.5
8.5
7.5
0.7
0.40
TYP
0
11.5
12.5
11.5
12.5
11.0
11.0
1.1
0.55
MAX UNITS
25 mV
14.0
15.0
14.0
µA
15.0
13.5
13.5
mA
0.70 V
output driver
PARAMETER
TEST CONDITIONS
Pullup resistance (PDRV)
Pulldown resistance (PDRV)
Pullup resistance (NDRV)
Pulldown resistance (NDRV)
Deadtime delay (PDRV high to NDRV high)
–50 mA (source),
–50 mA (source),
50 mA (sink),
50 mA (sink),
–50 mA (source),
–50 mA (source),
100 mA (sink),
50 mA (sink),
See Note 2
TA = 0°C to 85°C
TA = −40°C to 85°C
TA = 0°C to 85°C
TA = −40°C to 85°C
TA = 0°C to 85°C
TA = −40°C to 85°C
TA = 0°C to 85°C
TA = −40°C to 85°C
Deadtime delay (NDRV low to PDRV low)
See Note 2
NOTE: 1. Measured on COMP with the error amplifier in a unity gain (voltage follower) configuration.
NOTE: 2. 50% point of PDRV rise to NDRV rise and 50% point of NDRV fall to PDRV fall.
NOTE: 3. Enable high threshold = (VIN − 0.5).
MIN
4.5
3.5
6.0
4.0
4.5
3
2.0
1.5
150
70
TYP
6.0
6.0
9.0
9.0
6.0
6
3.0
3.0
215
125
MAX UNITS
9.0
9.0
16.5
16.5
Ω
9.0
9
4.5
4.5
250
ns
175
pin descriptions
CLSET: CLSET is used to program the pulse-by-pulse and overcurrent shutdown levels for the UCC3585. A
resistor connected between CLSET and VIN sets the over-current threshold. The over-current threshold follows
the following relationship:
lCL
+
1.25
RISET
RCLSET
RDS_ǒonǓ
COMP: Output of the voltage error amplifier. Loop compensation components are connected between COMP
and VFB.
4
www.ti.com