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TUSB2077A_15 Datasheet, PDF (4/26 Pages) Texas Instruments – TUSB2077A 7-Port Hub for the Universal Serial Bus With Optional Serial EEPROM Interface
TUSB2077A
SLLS414F – MARCH 2000 – REVISED AUGUST 2015
6 Pin Configuration and Functions
PT Package
48-Pin LQFP
Top View
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SUSPND 1
DP0PUR 2
DP0 3
DM0 4
GND 5
RESET 6
EECLK 7
EEDATA/GANGED 8
VCC 9
BUSPWR 10
PWRON1 11
OVRCUR1 12
36 PWRON7
35 DP6
34 DM6
33 OVRCUR6
32 PWRON6
31 DP5
30 DM5
29 OVRCUR5
28 PWRON5
27 DP4
26 DM4
25 OVRCUR4
PIN
NAME
NO.
BUSPWR
10
DM0
4
DM1
13
DM2
17
DM3
21
DM4
26
DM5
30
DM6
34
DM7
38
DP0
3
DP1
14
DP2
18
DP3
22
DP4
27
DP5
31
DP6
35
DP7
39
DP0PUR
2
EECLK
7
EEDATA/
GANGED
8
NC - No internal connection
Pin Functions
I/O
DESCRIPTION
Power source indicator. BUSPWR is an active-low input that indicates whether the downstream ports source their
I power from the USB cable or a local power supply. For the bus-power mode, this terminal must be pulled low, and for
the self-powered mode, this terminal must be pulled to 3.3 V. Input must not change dynamically during operation.
I/O Root port USB differential data minus. DM0 paired with DP0 constitutes the upstream USB port.
I/O USB differential data minus. DM1–DM7 paired with DP1–DP7 support up to four downstream USB ports.
I/O Root port USB differential data plus. DP0 paired with DM0 constitutes the upstream USB port.
I/O USB differential data plus. DP1–DP7 paired with DM1–DM7 support up to four downstream USB ports.
Pullup resistor connection. When a system reset happens (RESET being driven to low, but not USB reset) or any logic
O
level change on BUSPWR terminal, DP0PUR output is inactive (floating) until the internal counter reaches a 15-ms
time period. After the counter expires, DP0PUR is driven to the VCC (3.3 V) level thereafter until the next system reset
event occurs or there is a BUSPWR logic level change.
EEPROM serial clock. When EXTMEM is high, the EEPROM interface is disabled. The EECLK terminal is disabled and
O must be left floating (unconnected). When EXTMEM is low, EECLK acts as a 3-state serial clock output to the
EEPROM with a 100-μA internal pulldown.
EEPROM serial data/power-management mode indicator. When EXTMEM is high, EEDATA/GANGED selects between
I/O
ganged or per-port power overcurrent detection for the downstream ports. When EXTMEM is low, EEDATA/GANGED
acts as a serial data I/O for the EEPROM and is internally pulled down with a 100-μA pulldown. This standard TTL
input must not change dynamically during operation.
4
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