TPS826XXEVM Datasheet, PDF (4/13 Pages) Texas Instruments – TPS826xxEVM

Connector and Test Point Descriptions
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3.1.4 J4 VOUT
This header is the positive output of the step-down converter. The output voltage of the devices in the
TPS826xx families have fixed output voltages; refer to the specific device data sheet for detailed
information on the device output voltage.
3.1.5 J5 S+/S–
J5 S+/S– are the sense connection for the output of the converter. Connect a voltmeter, sense connection
of an electronic load, or oscilloscope to this header.
3.1.6 J6 GND
J6 is the return connection of the converter. A load can be connected between J6 and J4 (VOUT).
3.2 Jumpers and Switches
3.2.1 JP1 ENABLE
This jumper enables/disables the converter on the EVM. Placing a shorting bar between ENABLE and ON
turns on the converter. Placing a shorting bar between ENABLE and OFF disables the converter.
3.2.2 JP2 MODE
This jumper enables/disables the power-saving mode under light loads. Placing a shorting bar between
MODE and PWM disables the power-saving mode. If the power-save mode is disabled, the converter
operates in forced PWM mode over the entire load current range.
Placing a shorting bar between MODE and PSM enables the power-saving mode. The device operates in
power-saving mode under light load conditions. See the specific device data sheet for detailed information.
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TPS826xxEVM
SLVU383D – October 2010 – Revised November 2011
Copyright © 2010–2011, Texas Instruments Incorporated
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