TPS7A84 Datasheet, PDF (4/44 Pages) Texas Instruments – LDO Voltage Regulator

TPS7A84
SBVS233A – JANUARY 2016 – REVISED JANUARY 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over junction temperature range (unless otherwise noted)⁽¹⁾
IN, BIAS, PG, EN
IN, BIAS, PG, EN (5% duty cycle, pulse duration = 200 µs)
Voltage
SNS, OUT
NR/SS, FB
50mV, 100mV, 200mV, 400mV, 800mV, 1.6V
Current
OUT
PG (sink current into device)
Operating junction temperature, T_J
Storage temperature, T_stg
MIN
MAX
–0.3
7.0
–0.3
–0.3
–0.3
7.5
V_IN + 0.3⁽²⁾
3.6
–0.3
V_OUT + 0.3
Internally limited
5
–55
150
–55
150
UNIT
V
V
V
V
V
A
mA
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The absolute maximum rating is V_IN + 0.3 V or 7.0 V, whichever is smaller.
6.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾
VALUE
±2000
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
over junction temperature range (unless otherwise noted)
V_IN
V_BIAS
V_OUT
V_EN
I_OUT
C_IN
C_OUT
R_PG
C_NR/SS
C_FF
R₁
R₂
T_J
Input supply voltage range
Bias supply voltage range⁽¹⁾
Output voltage range⁽²⁾
Enable voltage range
Output current
Input capacitor
Output capacitor
Power-good pullup resistance
NR/SS capacitor
Feed-forward capacitor
Top resistor value in feedback network for
adjustable operation
Bottom resistor value in feedback network for
adjustable operation
Operating junction temperature
MIN
NOM
1.1
3.0
0.8
0
0
10
47
47 47 || 10 || 10⁽³⁾
10
10
10
12.1 ⁽⁴⁾
–40
MAX
6.5
6.5
5
V_IN
3
100
160 ⁽⁵⁾
125
UNIT
V
V
V
V
A
µF
µF
kΩ
nF
nF
kΩ
kΩ
°C
(1) BIAS supply is required when the V_IN supply is below 1.4 V. Conversely, no BIAS supply is required when the V_IN supply is higher than
or equal to 1.4 V. A BIAS supply helps improve dc and ac performance for V_IN ≤ 2.2 V.
(2) This output voltage range does not include device accuracy or accuracy of the feedback resistors.
(3) The recommended output capacitors are selected to optimize PSRR for the frequency range of 400 kHz to 700 kHz. This frequency
range is a typical value for dc-dc supplies.
(4) The 12.1-kΩ resistor is selected to optimize PSRR and noise by matching the internal R₁ value.
(5) The upper limit for the R₂ resistor is to ensure accuracy by making the current through the feedback network much larger than the
leakage current into the feedback node.
4
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