TPS75201 Datasheet, PDF (4/31 Pages) Texas Instruments – TPS752xxQ with RESET Output, TPS754xxQ with Power Good Output FAST-TRANSIENT-RESPONSE 2-A LOW-DROPOUT VOLTAGE REGULATORS

TPS752xxQ
TPS754xxQ
SLVS242C – MARCH 2000 – REVISED OCTOBER 2007
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ELECTRICAL CHARACTERISTICS
Over recommended operating temperature range (T_J = –40°C to +125°C), V_IN = V_OUT(TYP) + 1 V; I_OUT = 1 mA, V_EN = 0 V,
C_OUT = 47 μF, unless otherwise noted. Typical values are at T_J = +25°C.
TPS752xxQ, TPS754xxQ
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Adjustable output
V_OUT ⁽¹⁾
1.5 V output
1.8 V output
2.5 V output
I_GND ⁽²⁾
ΔV_OUT%/
V_OUT ^{(1), (2)}
ΔV_OUT%/ ΔI_OUT
V_N
3.3 V output
Ground pin current
Output voltage line regulation
Load regulation
Output noise voltage
BW = 300 Hz to 50
kHz
1.5 V ≤ V_OUT ≤ 5.5 V
2.7 V < V_IN < 5.5 V
2.8 V < V_IN < 5.5 V
3.5 V < V_IN < 5.5 V
4.3 V < V_IN < 5.5 V
I_OUT = 1 mA to 2 A
V_OUT + 1 V < V_IN ≤ 5 V
I_OUT = 1 mA to 2 A
V_OUT = 1.5 V, C_OUT = 100 μF
0.98V_OUT
1.470
1.764
2.450
3.234
V_OUT 1.02V_OUT
1.5
1.530
1.8
1.836 V
2.5
2.550
3.3
3.336
75
125 μA
0.01
0.1 %/V
1
mV
60
μV_RMS
V_DO
Dropout voltage⁽³⁾
TPS75433Q
TPS75233Q ^{IOUT = 2 A, VIN = 3.2 V}
210
400 mV
I_CL
Output current limit
T_SD
Shutdown
temperature
V_OUT = 0 V
3.3
+150
4.5 A
°C
I_STBY
I_FB
V_EN(HI)
V_EN(LO)
PSRR
RESET
(TPS752xxQ)
Standby current
FB input current
TPS75x01Q
High-level enable input voltage
Low-level enable input voltage
Power-supply ripple rejection⁽²⁾
Minimum input voltage for valid
RESET
Trip threshold voltage
Hysteresis voltage
Output low voltage
Leakage current
RESET timeout delay
EN = V_IN
FB = 1.5 V
f = 100 Hz, C_OUT = 100 μF,
I_OUT = 2 A, See ⁽¹⁾
I_OUT(RESET) = 300 μA,
V_(RESET) ≤ 0.8 V
V_OUT decreasing
Measured at V_OUT
V_IN = 2.7 V, I_OUT(RESET) = 1 mA
V_(RESET) = 5.5 V
1
–1
2
60
1
92
0.5
0.15
100
10 μA
1 μA
V
0.7 V
dB
1.3 V
98 %V_OUT
%V_OUT
0.4 V
1 μA
ms
PG
(TPS754xxQ)
Minimum input voltage for valid PG
Trip threshold voltage
Hysteresis voltage
Output low voltage
Leakage current
Input current (EN)
I_OUT(PG) = 300 μA, V_(PG) ≤ 0.8 V
V_OUT decreasing
Measured at V_OUT
I_OUT(PG) = 1mA
V_(PG) = 5.5 V
EN = V_IN
EN = 0 V
1.1
80
0.5
0.15
–1
–1
0
1.3 V
86 %V_OUT
%V_OUT
0.4 V
1 μA
1
μA
1
(1) Minimum V_IN = (V_OUT + 1 V) or 2.7 V, whichever is greater. Maximum V_IN = 5.5 V.
(2) If V_OUT ≤ 1.8 V, then V_IN(min) = 2.7 V, V_IN(max) = 5.5 V:
Line Regulation (mV) = (%/V) ´ ^{VOUT(VIN(Max) - 2.7V)} ´ 1000
100
If V_OUT ≥ 2.5 V, then V_IN(min) = V_OUT + 1 V, V_IN(max) = 5.5 V:
Line
Regulation
(mV)
=
(%/V)
´
V_OUT[V_IN(Max) - (V_OUT
100
+
1V)]
´
1000
(3) Input voltage equals V_OUT(Typ) – 100 mV; TPS75x33Q input voltage must drop to 3.2 V for this test.
4
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