TPS61000_15 Datasheet, PDF (4/25 Pages) Texas Instruments – Single- and Dual-Cell Boost Converter

TPS61000, TPS61001, TPS61002, TPS61003
TPS61004, TPS61005, TPS61006, TPS61007
SLVS279D – MARCH 2000 – REVISED AUGUST 2015
7 Specifications
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7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)⁽¹⁾
V_I
Input voltage (V_BAT, V_OUT, COMP, FB, LBO, EN, LBI)
Input voltage (SW)
Peak current into SW
Continuous total power dissipation
T_A
Operating free-air temperature
T_J
Maximum junction temperature
Lead temperature
T_stg Storage temperature
MIN
MAX
–0.3
3.6
–0.3
V_OUT + 0.7
1300
See Thermal Information
–40
85
150
260
–65
150
UNIT
V
V
mA
°C
°C
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-
C101 ⁽²⁾
VALUE
±1000
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
V_BAT
V_O
T_J
Supply voltage
Output current
Inductor
Input capacitor
Output capacitor
Operating junction temperature
V_BAT = 0.8 V
V_BAT = 0.8 V
MIN
NOM
MAX
UNIT
0.8
V_O
V
100
mA
250
10
33
µH
10
µF
22
µF
–40
125
°C
7.4 Thermal Information
THERMAL METRIC⁽¹⁾
TPS6100x
DGS (VSSOP)
UNIT
10 PINS
R_θJA
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
160.6
54.4
80.5
6.3
79.2
N/A
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
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