TPS22968 Datasheet, PDF (4/33 Pages) Texas Instruments – Dual Channel, Ultra-Low Resistance Load Switch

TPS22968, TPS22968N
SLVSCG3D – JANUARY 2014 – REVISED MARCH 2016
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature (unless otherwise noted)⁽¹⁾
V_IN1,2
V_BIAS
V_OUT1,2
V_ON1,2
I_MAX
I_PLS
T_J
T_stg
Input voltage
Bias voltage
Output voltage
ON voltage
Maximum continuous switch current per channel, T_A = 30 °C
Maximum pulsed switch current, pulse < 300 µs, 2% duty cycle
Maximum junction temperature
Storage temperature range
MIN
MAX UNIT ⁽²⁾
–0.3
6
V
–0.3
6
V
–0.3
6
V
–0.3
6
V
4
A
6
A
125
°C
–65
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
7.2 ESD Ratings
V_(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 ⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-C101 ⁽²⁾
VALUE
±2000
±1000
UNIT
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
7.3 Recommended Operating Conditions
MIN MAX UNIT
V_IN1,2
V_BIAS
V_ON1,2
V_OUT1,2
V_{IH, ON1,2}
V_{IL, ON1,2}
C_IN1,2
T_A
Input voltage range
Bias voltage range
ON voltage range
Output voltage range
High-level input voltage, ON1,2
Low-level input voltage, ON1,2
Input capacitor
Operating free-air temperature ⁽²⁾
V_BIAS = 2.5 V to 5.5 V
V_BIAS = 2.5 V to 5.5 V
0.8 V_BIAS
V
2.5
5.5 V
0
5.5 V
V_IN
V
1.2
5.5 V
0
0.5 V
1 ⁽¹⁾
µF
–40
105 °C
(1) Refer to the Application Information section.
(2) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature [T_A(max)] is dependent on the maximum operating junction temperature [T_J(max)], the
maximum power dissipation of the device in the application [P_D(max)], and the junction-to-ambient thermal resistance of the part/package
in the application (R_θJA), as given by the following equation: T_A(max) = T_J(max) – (R_θJA × P_D(max)).
7.4 Thermal Information
THERMAL METRIC ^{(1) (2)}
R_θJA
R_θJC(top)
R_θJB
ψ_JT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
TPS22968
DPU (WSON)
14 PINS
62.5
70.2
23.2
2.5
UNIT
°C/W
°C/W
°C/W
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
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