TP3465_11 Datasheet, PDF (4/19 Pages) Texas Instruments – TP3465 MICROWIRE(TM) Interface Device (MID)

MultiplexedMicroprocessoBr us Interface
The MULT INT pin is sampled on power-up and if LOW the microprocessor bus format is assumed to be Multiplexed and the
pin is considered an input pin to indicate Multiplexed bus format The pin has an internal pull-up and thus if pin is left floating it
will be considered as in Non-multiplexed mode The interface consists of an eight bit multiplexed Address Data microprocessor
bus (only the A0 A1 A2 and A3 address lines are decoded) and six control lines (CE RST AS MI RD DS WR (R W) and the
MULT input) which should be tied LOW
Name
Pin No.
28 Pkg.
Type
Function
AD0 -AD7
1, 2, 3, 4,
I/O
Address/Data bus. Transfers addresses and data
5 7 8 10
between the microprocessor and the MID
CE
19
I
Chip Enable. A LOW on this signal selects the MID for a
Read Write operation
WR/
RW
11
I
Write or Read-Write direction. This signal indicates a Write
operation or Read Write direction signal
RD/DS
12
I
Read or Data Strobe. With an Intel mP this signal indicates
a Read operation (active low polarity signal) or with a
Motorola mP a Data strobe (active high polarity signal)
AS/MI
21
I
Address Latch Enable or Address Strobe. A HIGH on this
line indicates an address on the external A D bus When
MULT e 1 (non-multiplexed bus) the pin indicates the
type of bus MI e 1 for NSC Intel format and MI e 0 for
Motorola format
RST
22
I
The RST is the master Reset input when LOW forces the
device in the RESET condition (same as Power-on-
Reset)
MULT/
INT
18
I
Multiplexed Bus input or INTerrupt output. It is internally
pulled HIGH to indicate a Non-Multiplexed bus format and
needs to be pulled LOW externally to indicate the
Multiplexed bus format
Non-Multiplexed Microprocessor Interface
The MULT INT pin is sampled on power-up and if not LOW the microprocessor bus format is assumed to be Non-multiplexed
This interface consists of a four-bit Address bus an eight-bit Data bus and six control lines (CE RST AS MI RD DS
WR (R WR) and the INT signal if enabled)
Name
A0 –A3
D0 – D7
CE
WR
(R W)
RD DS
AS MI
Pin No
28 Pkg
69
20 23
1234
5 7 8 10
19
11
12
21
Type
I
IO
I
I
I
I
Function
Address bus These 4 pins (accessible in the 28-pin package)
are used to address the 16 registers
Data bus for data transfer between the microprocessor and the
MID
Chip Enable A LOW on this signal selects the MID for a
Read Write operation
Write or Read-Write direction This signal indicates a Write
operation or Read Write direction signal
Read or Data Strobe With an Intel mP this signal indicates a
Read operation (active low polarity signal) or with a Motorola mP
a Data Strobe (active high polarity signal)
Address Latch Enable or Address Strobe A HIGH on this line
indicates an address on the external A D bus When MULTe1
(non-multiplexed bus) the pin indicates the type of bus MIe1
for NSC Intel format and MIe0 for Motorola format
3