TLC5947_17 Datasheet, PDF (4/33 Pages) Texas Instruments – 24-Channel, 12-Bit PWM LED Driver With Internal Oscillator

TLC5947
SBVS114B – JULY 2008 – REVISED JANUARY 2015
www.ti.com
NAME
OUT17
OUT18
OUT19
OUT20
OUT21
OUT22
OUT23
SCLK
SIN
SOUT
VCC
XLAT
Pin Functions (continued)
PIN
I/O
RHB NO. DAP NO.
DESCRIPTION
18
22
O Constant-current output
19
23
O Constant-current output
20
24
O Constant-current output
21
25
O Constant-current output
22
26
O Constant-current output
23
27
O Constant-current output
24
28
O Constant-current output
Serial data shift clock. Schmitt buffer input. Data present on the SIN pin are shifted into the shift
31
3
I
register with the rising edge of the SCLK pin. Data are shifted to the MSB side by 1-bit
synchronizing of the rising edge of SCLK. The MSB data appears on SOUT at the falling edge of
SCLK. A rising edge on the SCLK input is allowed 100 ns after an XLAT rising edge.
32
4
I Serial input for grayscale data
Serial data output. This output is connected to the shift register placed after the MSB of the
25
29
O
grayscale shift register. Therefore, the MSB data of the grayscale shift register appears at the
falling edge of SCLK. This function reduces the data shifting errors caused by small timing
margins between SIN and SCLK.
28
32
— Power-supply voltage
The data in the grayscale shift register are moved to the grayscale data latch with a low-to-high
26
30
I
transition on this pin. When the XLAT rising edge is input, all constant-current outputs are forced
off until the next grayscale display period. The grayscale counter is not reset to zero with a rising
edge of XLAT.
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range, unless otherwise noted.⁽¹⁾⁽²⁾
MIN
MAX
UNIT
V_CC
Supply voltage: V_CC
I_O
Output current (dc) OUT0 to OUT23
V_I
Input voltage
SIN, SCLK, XLAT, BLANK
V_O
Output voltage
SOUT
OUT0 to OUT23
–0.3
–0.3
–0.3
–0.3
6.0
V
38
mA
V_CC + 0.3
V
V_CC + 0.3
V
33
V
T_J(MAX)
T_stg
Operating junction temperature
Storage temperature
150
°C
–55
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
6.2 ESD Ratings
V_(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins ⁽¹⁾
Charged device model (CDM), per JEDEC specification
JESD22-C101, all pins⁽²⁾
VALUE
±2500
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
4
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