SN74GTLP22033 Datasheet, PDF (4/21 Pages) Texas Instruments – 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH

SN74GTLP22033
8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER
WITH SPLIT LVTTL PORT AND FEEDBACK PATH
SCES354C – JUNE 2001 – REVISED SEPTEMBER 2001
Function Tables
OEBA
L
L
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
OEAB
L
X
H
H
H
L
X
L
X
L
X
L
X
L
X
L
X
OEAB
X
H
L
L
L
X
H
X
H
X
H
X
H
X
H
X
H
OMODE1
X
X
L
L
H
X
X
X
X
X
X
X
X
X
X
X
X
INPUTS
OMODE0
X
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
FUNCTION/MODE
IMODE1
X
X
X
X
X
L
L
L
L
H
H
L
L
L
L
H
H
IMODE0
X
X
X
X
X
L
L
H
H
X
X
L
L
H
H
X
X
LOOPBACK
X
X
X
X
X
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
X
X
X
X
L
OUTPUT
Z
Inverted AI to B
Inverted B to AO
Inverted B to AO
Inverted B to AO
AI to AO
AI to AO
AI to AO
Inverted AI to B,
Inverted B to AO
MODE
Isolation
Buffer
Flip-flop
Latch
Buffer
Flip-flop
Latch
Buffer
Flip-flop
Latch
Transparent with
feedback path
ENABLE/DISABLE
INPUTS
OUTPUTS
OEBA OEAB OEAB AO
B
L
X
X
Z
H
X
X
Active
X
L
L
Z
X
L
H
Z
X
H
L
Active
X
H
H
Z
BUFFER
INPUT OUTPUT
L
H
H
L
LATCH
INPUTS
OUTPUT
CLK/LE DATA
H
L
H
H
H
L
L
X
Q0
4
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